Loading drivers/platform/msm/ipa/ipa_v3/ipa.c +3 −9 Original line number Diff line number Diff line Loading @@ -4974,14 +4974,8 @@ static int ipa3_pre_init(const struct ipa3_plat_drv_res *resource_p, /* ipa3_ctx->pdev and ipa3_ctx->uc_pdev will be set in the smmu probes*/ ipa3_ctx->master_pdev = ipa_pdev; ipa3_ctx->smmu_present = smmu_info.present; if (!ipa3_ctx->smmu_present) { for (i = 0; i < IPA_SMMU_CB_MAX; i++) ipa3_ctx->s1_bypass_arr[i] = true; } else { ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_AP] = smmu_info.s1_bypass_arr[IPA_SMMU_CB_AP]; } ipa3_ctx->ipa_wrapper_base = resource_p->ipa_mem_base; ipa3_ctx->ipa_wrapper_size = resource_p->ipa_mem_size; Loading Loading @@ -6175,7 +6169,7 @@ static int ipa_smmu_ap_cb_probe(struct device *dev) smmu_info.present[IPA_SMMU_CB_AP] = true; ipa3_ctx->pdev = dev; return result; return 0; } static int ipa_smmu_cb_probe(struct device *dev, enum ipa_smmu_cb_type cb_type) Loading drivers/platform/msm/ipa/ipa_v3/ipa_i.h +0 −1 Original line number Diff line number Diff line Loading @@ -1370,7 +1370,6 @@ struct ipa3_context { u32 ee; bool apply_rg10_wa; bool gsi_ch20_wa; bool smmu_present; bool s1_bypass_arr[IPA_SMMU_CB_MAX]; u32 wdi_map_cnt; struct wakeup_source w_lock; Loading drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +1 −1 Original line number Diff line number Diff line Loading @@ -1223,7 +1223,7 @@ static const struct ipa_ep_configuration ipa3_ep_mapping true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, QMB_MASTER_SELECT_DDR, { 19, 12, 9, 9, IPA_EE_AP } }, [IPA_4_0][IPA_CLIENT_USB_DPL_CONS] = { true, IPA_v4_0_GROUP_UL_DL, Loading Loading
drivers/platform/msm/ipa/ipa_v3/ipa.c +3 −9 Original line number Diff line number Diff line Loading @@ -4974,14 +4974,8 @@ static int ipa3_pre_init(const struct ipa3_plat_drv_res *resource_p, /* ipa3_ctx->pdev and ipa3_ctx->uc_pdev will be set in the smmu probes*/ ipa3_ctx->master_pdev = ipa_pdev; ipa3_ctx->smmu_present = smmu_info.present; if (!ipa3_ctx->smmu_present) { for (i = 0; i < IPA_SMMU_CB_MAX; i++) ipa3_ctx->s1_bypass_arr[i] = true; } else { ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_AP] = smmu_info.s1_bypass_arr[IPA_SMMU_CB_AP]; } ipa3_ctx->ipa_wrapper_base = resource_p->ipa_mem_base; ipa3_ctx->ipa_wrapper_size = resource_p->ipa_mem_size; Loading Loading @@ -6175,7 +6169,7 @@ static int ipa_smmu_ap_cb_probe(struct device *dev) smmu_info.present[IPA_SMMU_CB_AP] = true; ipa3_ctx->pdev = dev; return result; return 0; } static int ipa_smmu_cb_probe(struct device *dev, enum ipa_smmu_cb_type cb_type) Loading
drivers/platform/msm/ipa/ipa_v3/ipa_i.h +0 −1 Original line number Diff line number Diff line Loading @@ -1370,7 +1370,6 @@ struct ipa3_context { u32 ee; bool apply_rg10_wa; bool gsi_ch20_wa; bool smmu_present; bool s1_bypass_arr[IPA_SMMU_CB_MAX]; u32 wdi_map_cnt; struct wakeup_source w_lock; Loading
drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +1 −1 Original line number Diff line number Diff line Loading @@ -1223,7 +1223,7 @@ static const struct ipa_ep_configuration ipa3_ep_mapping true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, QMB_MASTER_SELECT_DDR, { 19, 12, 9, 9, IPA_EE_AP } }, [IPA_4_0][IPA_CLIENT_USB_DPL_CONS] = { true, IPA_v4_0_GROUP_UL_DL, Loading