Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 95f4838e authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull parisc fixes from Helge Deller:
 "This time we made the kernel- and interruption stack allocation
  reentrant which fixed some strange kernel crashes (specifically
  protection ID traps).

  Furthemore this patchset fixes the interrupt stack in UP and SMP
  configurations by using native locking instructions.  And finally
  usage of floating point calculations on parisc were disabled in the
  MPILIB."

* 'parisc-for-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
  parisc: fix irq stack on UP and SMP
  parisc/superio: Use module_pci_driver to register driver
  parisc: make interrupt and interruption stack allocation reentrant
  parisc: show number of FPE and unaligned access handler calls in /proc/interrupts
  parisc: add additional parisc git tree to MAINTAINERS file
  parisc: use PAGE_SHIFT instead of hardcoded value 12 in pacache.S
  parisc: add rp5470 entry to machine database
  MPILIB: disable usage of floating point registers on parisc
parents 088d812f d96b51ec
Loading
Loading
Loading
Loading
+1 −0
Original line number Diff line number Diff line
@@ -6084,6 +6084,7 @@ L: linux-parisc@vger.kernel.org
W:	http://www.parisc-linux.org/
Q:	http://patchwork.kernel.org/project/linux-parisc/list/
T:	git git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6.git
T:	git git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux.git
S:	Maintained
F:	arch/parisc/
F:	drivers/parisc/
+0 −1
Original line number Diff line number Diff line
@@ -438,7 +438,6 @@
	SAVE_SP  (%sr4, PT_SR4 (\regs))
	SAVE_SP  (%sr5, PT_SR5 (\regs))
	SAVE_SP  (%sr6, PT_SR6 (\regs))
	SAVE_SP  (%sr7, PT_SR7 (\regs))

	SAVE_CR  (%cr17, PT_IASQ0(\regs))
	mtctl	 %r0,	%cr17
+2 −5
Original line number Diff line number Diff line
@@ -17,17 +17,14 @@

typedef struct {
	unsigned int __softirq_pending;
#ifdef CONFIG_DEBUG_STACKOVERFLOW
	unsigned int kernel_stack_usage;
#ifdef CONFIG_IRQSTACKS
	unsigned int irq_stack_usage;
	unsigned int irq_stack_counter;
#endif
#endif
#ifdef CONFIG_SMP
	unsigned int irq_resched_count;
	unsigned int irq_call_count;
#endif
	unsigned int irq_unaligned_count;
	unsigned int irq_fpassist_count;
	unsigned int irq_tlb_count;
} ____cacheline_aligned irq_cpustat_t;

+0 −21
Original line number Diff line number Diff line
@@ -17,7 +17,6 @@
#include <asm/ptrace.h>
#include <asm/types.h>
#include <asm/percpu.h>

#endif /* __ASSEMBLY__ */

/*
@@ -58,26 +57,6 @@

#ifndef __ASSEMBLY__

/*
 * IRQ STACK - used for irq handler
 */
#ifdef __KERNEL__

#include <linux/spinlock_types.h>

#define IRQ_STACK_SIZE      (4096 << 2) /* 16k irq stack size */

union irq_stack_union {
	unsigned long stack[IRQ_STACK_SIZE/sizeof(unsigned long)];
	raw_spinlock_t lock;
};

DECLARE_PER_CPU(union irq_stack_union, irq_stack_union);

void call_on_stack(unsigned long p1, void *func, unsigned long new_stack);

#endif /* __KERNEL__ */

/*
 * Data detected about CPUs at boot time which is the same for all CPU's.
 * HP boxes are SMP - ie identical processors.
+10 −9
Original line number Diff line number Diff line
@@ -65,15 +65,11 @@
	rsm	PSW_SM_I, %r0	/* barrier for "Relied upon Translation */
	mtsp	%r0, %sr4
	mtsp	%r0, %sr5
	mfsp	%sr7, %r1
	or,=    %r0,%r1,%r0	/* Only save sr7 in sr3 if sr7 != 0 */
	mtsp	%r1, %sr3
	mtsp	%r0, %sr6
	tovirt_r1 %r29
	load32	KERNEL_PSW, %r1

	rsm     PSW_SM_QUIET,%r0	/* second "heavy weight" ctl op */
	mtsp	%r0, %sr6
	mtsp	%r0, %sr7
	mtctl	%r0, %cr17	/* Clear IIASQ tail */
	mtctl	%r0, %cr17	/* Clear IIASQ head */
	mtctl	%r1, %ipsw
@@ -119,17 +115,20 @@

	/* we save the registers in the task struct */

	copy	%r30, %r17
	mfctl   %cr30, %r1
	ldo	THREAD_SZ_ALGN(%r1), %r30
	mtsp	%r0,%sr7
	mtsp	%r16,%sr3
	tophys  %r1,%r9
	LDREG	TI_TASK(%r9), %r1	/* thread_info -> task_struct */
	tophys  %r1,%r9
	ldo     TASK_REGS(%r9),%r9
	STREG   %r30, PT_GR30(%r9)
	STREG   %r17,PT_GR30(%r9)
	STREG   %r29,PT_GR29(%r9)
	STREG   %r26,PT_GR26(%r9)
	STREG	%r16,PT_SR7(%r9)
	copy    %r9,%r29
	mfctl   %cr30, %r1
	ldo	THREAD_SZ_ALGN(%r1), %r30
	.endm

	.macro  get_stack_use_r30
@@ -137,10 +136,12 @@
	/* we put a struct pt_regs on the stack and save the registers there */

	tophys  %r30,%r9
	STREG   %r30,PT_GR30(%r9)
	copy	%r30,%r1
	ldo	PT_SZ_ALGN(%r30),%r30
	STREG   %r1,PT_GR30(%r9)
	STREG   %r29,PT_GR29(%r9)
	STREG   %r26,PT_GR26(%r9)
	STREG	%r16,PT_SR7(%r9)
	copy    %r9,%r29
	.endm

Loading