Merge "msm: ipa3: enable DCD (dynamic clock division)" into msm-4.8 (95593d9b) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/platform/msm/ipa/ipa_v3/ipa.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -4616,6 +4616,9 @@ static int ipa3_pre_init(const struct ipa3_plat_drv_res *resource_p,
		IPADBG("Initialization of ipa interrupts skipped\n");
		}

		if (ipa3_ctx->ipa_hw_type >= IPA_HW_v3_5)
		ipa3_enable_dcd();

		INIT_LIST_HEAD(&ipa3_ctx->ipa_ready_cb_list);

		init_completion(&ipa3_ctx->init_completion_obj);

+1 −0

Original line number	Diff line number	Diff line
		@@ -2031,4 +2031,5 @@ int ipa3_get_ntn_stats(struct Ipa3HwStatsNTNInfoData_t *stats);
		struct dentry *ipa_debugfs_get_root(void);
		bool ipa3_is_msm_device(void);
		struct device *ipa3_get_pdev(void);
		void ipa3_enable_dcd(void);
		#endif /* _IPA3_I_H_ */

+18 −0

Original line number	Diff line number	Diff line
		@@ -4069,3 +4069,21 @@ struct device *ipa3_get_pdev(void)

		return ipa3_ctx->pdev;
		}

		/**
		* ipa3_enable_dcd() - enable dynamic clock division on IPA
		*
		* Return value: Non applicable
		*
		*/
		void ipa3_enable_dcd(void)
		{
		struct ipahal_reg_idle_indication_cfg idle_indication_cfg;

		/* recommended values for IPA 3.5 according to IPA HPG */
		idle_indication_cfg.const_non_idle_enable = 0;
		idle_indication_cfg.enter_idle_debounce_thresh = 256;

		ipahal_write_reg_fields(IPA_IDLE_INDICATION_CFG,
		&idle_indication_cfg);
		}

+21 −0

Original line number	Diff line number	Diff line
		@@ -909,6 +909,24 @@ static void ipareg_construct_tx_cfg(enum ipahal_reg_name reg,
		IPA_TX_CFG_PREFETCH_ALMOST_EMPTY_SIZE_BMSK_V3_5);
		}

		static void ipareg_construct_idle_indication_cfg(enum ipahal_reg_name reg,
		const void fields, u32 val)
		{
		struct ipahal_reg_idle_indication_cfg *idle_indication_cfg;

		idle_indication_cfg = (struct ipahal_reg_idle_indication_cfg *)fields;

		IPA_SETFIELD_IN_REG(*val,
		idle_indication_cfg->enter_idle_debounce_thresh,
		IPA_IDLE_INDICATION_CFG_ENTER_IDLE_DEBOUNCE_THRESH_SHFT_V3_5,
		IPA_IDLE_INDICATION_CFG_ENTER_IDLE_DEBOUNCE_THRESH_BMSK_V3_5);

		IPA_SETFIELD_IN_REG(*val,
		idle_indication_cfg->const_non_idle_enable,
		IPA_IDLE_INDICATION_CFG_CONST_NON_IDLE_ENABLE_SHFT_V3_5,
		IPA_IDLE_INDICATION_CFG_CONST_NON_IDLE_ENABLE_BMSK_V3_5);
		}

		/*
		* struct ipahal_reg_obj - Register H/W information for specific IPA version
		* @construct - CB to construct register value from abstracted structure
		@@ -1185,6 +1203,9 @@ static struct ipahal_reg_obj ipahal_reg_objs[IPA_HW_MAX][IPA_REG_MAX] = {
		[IPA_HW_v3_5][IPA_SPARE_REG_2] = {
		ipareg_construct_dummy, ipareg_parse_dummy,
		0x00002784, 0},
		[IPA_HW_v3_5][IPA_IDLE_INDICATION_CFG] = {
		ipareg_construct_idle_indication_cfg, ipareg_parse_dummy,
		0x00000220, 0},
		};

		/*

+11 −0

Original line number	Diff line number	Diff line
		@@ -83,6 +83,7 @@ enum ipahal_reg_name {
		IPA_QSB_MAX_WRITES,
		IPA_QSB_MAX_READS,
		IPA_TX_CFG,
		IPA_IDLE_INDICATION_CFG,
		IPA_REG_MAX,
		};

		@@ -329,6 +330,16 @@ struct ipahal_reg_tx_cfg {
		u16 prefetch_almost_empty_size;
		};

		/*
		* struct ipahal_reg_idle_indication_cfg - IPA IDLE_INDICATION_CFG register
		* @const_non_idle_enable: enable the asserting of the IDLE value and DCD
		* @enter_idle_debounce_thresh: configure the debounce threshold
		*/
		struct ipahal_reg_idle_indication_cfg {
		u16 enter_idle_debounce_thresh;
		bool const_non_idle_enable;
		};

		/*
		* ipahal_reg_name_str() - returns string that represent the register
		* @reg_name: [in] register name