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Commit 9542c237 authored by Thierry Reding's avatar Thierry Reding
Browse files

drm/tegra: sor: Operate on struct drm_dp_aux * 



Instead of getting a pointer to the driver-specific wrapper of AUX
channels, use the AUX channel objects directly to avoid hackish casting
between the two types.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent a07cdfe5

drivers/gpu/drm/tegra/dpaux.c

+23 −18
Original line number Diff line number Diff line
@@ -436,7 +436,7 @@ struct platform_driver tegra_dpaux_driver = { 
	.remove = tegra_dpaux_remove,

};



struct tegra_dpaux *tegra_dpaux_find_by_of_node(struct device_node *np)

struct drm_dp_aux *drm_dp_aux_find_by_of_node(struct device_node *np)

{

	struct tegra_dpaux *dpaux;
@@ -445,7 +445,7 @@ struct tegra_dpaux *tegra_dpaux_find_by_of_node(struct device_node *np) 
	list_for_each_entry(dpaux, &dpaux_list, list)

		if (np == dpaux->dev->of_node) {

			mutex_unlock(&dpaux_lock);

			return dpaux;

			return &dpaux->aux;

		}



	mutex_unlock(&dpaux_lock);
@@ -453,8 +453,9 @@ struct tegra_dpaux *tegra_dpaux_find_by_of_node(struct device_node *np) 
	return NULL;

}



int tegra_dpaux_attach(struct tegra_dpaux *dpaux, struct tegra_output *output)

int drm_dp_aux_attach(struct drm_dp_aux *aux, struct tegra_output *output)

{

	struct tegra_dpaux *dpaux = to_dpaux(aux);

	unsigned long timeout;

	int err;
@@ -470,7 +471,7 @@ int tegra_dpaux_attach(struct tegra_dpaux *dpaux, struct tegra_output *output) 
	while (time_before(jiffies, timeout)) {

		enum drm_connector_status status;



		status = tegra_dpaux_detect(dpaux);

		status = drm_dp_aux_detect(aux);

		if (status == connector_status_connected) {

			enable_irq(dpaux->irq);

			return 0;
@@ -482,8 +483,9 @@ int tegra_dpaux_attach(struct tegra_dpaux *dpaux, struct tegra_output *output) 
	return -ETIMEDOUT;

}



int tegra_dpaux_detach(struct tegra_dpaux *dpaux)

int drm_dp_aux_detach(struct drm_dp_aux *aux)

{

	struct tegra_dpaux *dpaux = to_dpaux(aux);

	unsigned long timeout;

	int err;
@@ -498,7 +500,7 @@ int tegra_dpaux_detach(struct tegra_dpaux *dpaux) 
	while (time_before(jiffies, timeout)) {

		enum drm_connector_status status;



		status = tegra_dpaux_detect(dpaux);

		status = drm_dp_aux_detect(aux);

		if (status == connector_status_disconnected) {

			dpaux->output = NULL;

			return 0;
@@ -510,8 +512,9 @@ int tegra_dpaux_detach(struct tegra_dpaux *dpaux) 
	return -ETIMEDOUT;

}



enum drm_connector_status tegra_dpaux_detect(struct tegra_dpaux *dpaux)

enum drm_connector_status drm_dp_aux_detect(struct drm_dp_aux *aux)

{

	struct tegra_dpaux *dpaux = to_dpaux(aux);

	u32 value;



	value = tegra_dpaux_readl(dpaux, DPAUX_DP_AUXSTAT);
@@ -522,8 +525,9 @@ enum drm_connector_status tegra_dpaux_detect(struct tegra_dpaux *dpaux) 
	return connector_status_disconnected;

}



int tegra_dpaux_enable(struct tegra_dpaux *dpaux)

int drm_dp_aux_enable(struct drm_dp_aux *aux)

{

	struct tegra_dpaux *dpaux = to_dpaux(aux);

	u32 value;



	value = DPAUX_HYBRID_PADCTL_AUX_CMH(2) |
@@ -540,8 +544,9 @@ int tegra_dpaux_enable(struct tegra_dpaux *dpaux) 
	return 0;

}



int tegra_dpaux_disable(struct tegra_dpaux *dpaux)

int drm_dp_aux_disable(struct drm_dp_aux *aux)

{

	struct tegra_dpaux *dpaux = to_dpaux(aux);

	u32 value;



	value = tegra_dpaux_readl(dpaux, DPAUX_HYBRID_SPARE);
@@ -551,11 +556,11 @@ int tegra_dpaux_disable(struct tegra_dpaux *dpaux) 
	return 0;

}



int tegra_dpaux_prepare(struct tegra_dpaux *dpaux, u8 encoding)

int drm_dp_aux_prepare(struct drm_dp_aux *aux, u8 encoding)

{

	int err;



	err = drm_dp_dpcd_writeb(&dpaux->aux, DP_MAIN_LINK_CHANNEL_CODING_SET,

	err = drm_dp_dpcd_writeb(aux, DP_MAIN_LINK_CHANNEL_CODING_SET,

				 encoding);

	if (err < 0)

		return err;
@@ -563,7 +568,7 @@ int tegra_dpaux_prepare(struct tegra_dpaux *dpaux, u8 encoding) 
	return 0;

}



int tegra_dpaux_train(struct tegra_dpaux *dpaux, struct drm_dp_link *link,

int drm_dp_aux_train(struct drm_dp_aux *aux, struct drm_dp_link *link,

		     u8 pattern)

{

	u8 tp = pattern & DP_TRAINING_PATTERN_MASK;
@@ -571,7 +576,7 @@ int tegra_dpaux_train(struct tegra_dpaux *dpaux, struct drm_dp_link *link, 
	unsigned int i;

	int err;



	err = drm_dp_dpcd_writeb(&dpaux->aux, DP_TRAINING_PATTERN_SET, pattern);

	err = drm_dp_dpcd_writeb(aux, DP_TRAINING_PATTERN_SET, pattern);

	if (err < 0)

		return err;
@@ -584,14 +589,14 @@ int tegra_dpaux_train(struct tegra_dpaux *dpaux, struct drm_dp_link *link, 
			    DP_TRAIN_MAX_SWING_REACHED |

			    DP_TRAIN_VOLTAGE_SWING_LEVEL_0;



	err = drm_dp_dpcd_write(&dpaux->aux, DP_TRAINING_LANE0_SET, values,

	err = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_SET, values,

				link->num_lanes);

	if (err < 0)

		return err;



	usleep_range(500, 1000);



	err = drm_dp_dpcd_read_link_status(&dpaux->aux, status);

	err = drm_dp_dpcd_read_link_status(aux, status);

	if (err < 0)

		return err;
@@ -609,11 +614,11 @@ int tegra_dpaux_train(struct tegra_dpaux *dpaux, struct drm_dp_link *link, 
		break;



	default:

		dev_err(dpaux->dev, "unsupported training pattern %u\n", tp);

		dev_err(aux->dev, "unsupported training pattern %u\n", tp);

		return -EINVAL;

	}



	err = drm_dp_dpcd_writeb(&dpaux->aux, DP_EDP_CONFIGURATION_SET, 0);

	err = drm_dp_dpcd_writeb(aux, DP_EDP_CONFIGURATION_SET, 0);

	if (err < 0)

		return err;

drivers/gpu/drm/tegra/drm.h

+9 −10
Original line number Diff line number Diff line
@@ -247,17 +247,16 @@ void tegra_output_connector_destroy(struct drm_connector *connector); 
void tegra_output_encoder_destroy(struct drm_encoder *encoder);



/* from dpaux.c */

struct tegra_dpaux;

struct drm_dp_link;



struct tegra_dpaux *tegra_dpaux_find_by_of_node(struct device_node *np);

enum drm_connector_status tegra_dpaux_detect(struct tegra_dpaux *dpaux);

int tegra_dpaux_attach(struct tegra_dpaux *dpaux, struct tegra_output *output);

int tegra_dpaux_detach(struct tegra_dpaux *dpaux);

int tegra_dpaux_enable(struct tegra_dpaux *dpaux);

int tegra_dpaux_disable(struct tegra_dpaux *dpaux);

int tegra_dpaux_prepare(struct tegra_dpaux *dpaux, u8 encoding);

int tegra_dpaux_train(struct tegra_dpaux *dpaux, struct drm_dp_link *link,

struct drm_dp_aux *drm_dp_aux_find_by_of_node(struct device_node *np);

enum drm_connector_status drm_dp_aux_detect(struct drm_dp_aux *aux);

int drm_dp_aux_attach(struct drm_dp_aux *aux, struct tegra_output *output);

int drm_dp_aux_detach(struct drm_dp_aux *aux);

int drm_dp_aux_enable(struct drm_dp_aux *aux);

int drm_dp_aux_disable(struct drm_dp_aux *aux);

int drm_dp_aux_prepare(struct drm_dp_aux *aux, u8 encoding);

int drm_dp_aux_train(struct drm_dp_aux *aux, struct drm_dp_link *link,

		     u8 pattern);



/* from fb.c */

drivers/gpu/drm/tegra/sor.c

+28 −32
Original line number Diff line number Diff line
@@ -173,7 +173,7 @@ struct tegra_sor { 
	struct clk *clk_dp;

	struct clk *clk;



	struct tegra_dpaux *dpaux;

	struct drm_dp_aux *aux;



	struct drm_info_list *debugfs_files;

	struct drm_minor *minor;
@@ -273,7 +273,7 @@ static int tegra_sor_dp_train_fast(struct tegra_sor *sor, 
		   SOR_DP_PADCTL_CM_TXD_1 | SOR_DP_PADCTL_CM_TXD_0);

	tegra_sor_writel(sor, value, SOR_DP_PADCTL0);



	err = tegra_dpaux_prepare(sor->dpaux, DP_SET_ANSI_8B10B);

	err = drm_dp_aux_prepare(sor->aux, DP_SET_ANSI_8B10B);

	if (err < 0)

		return err;
@@ -288,7 +288,7 @@ static int tegra_sor_dp_train_fast(struct tegra_sor *sor, 


	pattern = DP_TRAINING_PATTERN_1;



	err = tegra_dpaux_train(sor->dpaux, link, pattern);

	err = drm_dp_aux_train(sor->aux, link, pattern);

	if (err < 0)

		return err;
@@ -309,7 +309,7 @@ static int tegra_sor_dp_train_fast(struct tegra_sor *sor, 


	pattern = DP_LINK_SCRAMBLING_DISABLE | DP_TRAINING_PATTERN_2;



	err = tegra_dpaux_train(sor->dpaux, link, pattern);

	err = drm_dp_aux_train(sor->aux, link, pattern);

	if (err < 0)

		return err;
@@ -324,7 +324,7 @@ static int tegra_sor_dp_train_fast(struct tegra_sor *sor, 


	pattern = DP_TRAINING_PATTERN_DISABLE;



	err = tegra_dpaux_train(sor->dpaux, link, pattern);

	err = drm_dp_aux_train(sor->aux, link, pattern);

	if (err < 0)

		return err;
@@ -1044,8 +1044,8 @@ tegra_sor_connector_detect(struct drm_connector *connector, bool force) 
	struct tegra_output *output = connector_to_output(connector);

	struct tegra_sor *sor = to_sor(output);



	if (sor->dpaux)

		return tegra_dpaux_detect(sor->dpaux);

	if (sor->aux)

		return drm_dp_aux_detect(sor->aux);



	return tegra_output_connector_detect(connector, force);

}
@@ -1066,13 +1066,13 @@ static int tegra_sor_connector_get_modes(struct drm_connector *connector) 
	struct tegra_sor *sor = to_sor(output);

	int err;



	if (sor->dpaux)

		tegra_dpaux_enable(sor->dpaux);

	if (sor->aux)

		drm_dp_aux_enable(sor->aux);



	err = tegra_output_connector_get_modes(connector);



	if (sor->dpaux)

		tegra_dpaux_disable(sor->dpaux);

	if (sor->aux)

		drm_dp_aux_disable(sor->aux);



	return err;

}
@@ -1128,8 +1128,8 @@ static void tegra_sor_edp_disable(struct drm_encoder *encoder) 
	if (err < 0)

		dev_err(sor->dev, "failed to power down SOR: %d\n", err);



	if (sor->dpaux) {

		err = tegra_dpaux_disable(sor->dpaux);

	if (sor->aux) {

		err = drm_dp_aux_disable(sor->aux);

		if (err < 0)

			dev_err(sor->dev, "failed to disable DP: %d\n", err);

	}
@@ -1196,7 +1196,6 @@ static void tegra_sor_edp_enable(struct drm_encoder *encoder) 
	struct tegra_sor *sor = to_sor(output);

	struct tegra_sor_config config;

	struct drm_dp_link link;

	struct drm_dp_aux *aux;

	int err = 0;

	u32 value;
@@ -1209,15 +1208,12 @@ static void tegra_sor_edp_enable(struct drm_encoder *encoder) 
	if (output->panel)

		drm_panel_prepare(output->panel);



	/* FIXME: properly convert to struct drm_dp_aux */

	aux = (struct drm_dp_aux *)sor->dpaux;



	if (sor->dpaux) {

		err = tegra_dpaux_enable(sor->dpaux);

	if (sor->aux) {

		err = drm_dp_aux_enable(sor->aux);

		if (err < 0)

			dev_err(sor->dev, "failed to enable DP: %d\n", err);



		err = drm_dp_link_probe(aux, &link);

		err = drm_dp_link_probe(sor->aux, &link);

		if (err < 0) {

			dev_err(sor->dev, "failed to probe eDP link: %d\n",

				err);
@@ -1434,20 +1430,20 @@ static void tegra_sor_edp_enable(struct drm_encoder *encoder) 
	value |= SOR_DP_PADCTL_PAD_CAL_PD;

	tegra_sor_writel(sor, value, SOR_DP_PADCTL0);



	if (sor->dpaux) {

	if (sor->aux) {

		u8 rate, lanes;



		err = drm_dp_link_probe(aux, &link);

		err = drm_dp_link_probe(sor->aux, &link);

		if (err < 0)

			dev_err(sor->dev, "failed to probe eDP link: %d\n",

				err);



		err = drm_dp_link_power_up(aux, &link);

		err = drm_dp_link_power_up(sor->aux, &link);

		if (err < 0)

			dev_err(sor->dev, "failed to power up eDP link: %d\n",

				err);



		err = drm_dp_link_configure(aux, &link);

		err = drm_dp_link_configure(sor->aux, &link);

		if (err < 0)

			dev_err(sor->dev, "failed to configure eDP link: %d\n",

				err);
@@ -2148,7 +2144,7 @@ static int tegra_sor_init(struct host1x_client *client) 
	int encoder = DRM_MODE_ENCODER_NONE;

	int err;



	if (!sor->dpaux) {

	if (!sor->aux) {

		if (sor->soc->supports_hdmi) {

			connector = DRM_MODE_CONNECTOR_HDMIA;

			encoder = DRM_MODE_ENCODER_TMDS;
@@ -2199,8 +2195,8 @@ static int tegra_sor_init(struct host1x_client *client) 
			dev_err(sor->dev, "debugfs setup failed: %d\n", err);

	}



	if (sor->dpaux) {

		err = tegra_dpaux_attach(sor->dpaux, &sor->output);

	if (sor->aux) {

		err = drm_dp_aux_attach(sor->aux, &sor->output);

		if (err < 0) {

			dev_err(sor->dev, "failed to attach DP: %d\n", err);

			return err;
@@ -2249,8 +2245,8 @@ static int tegra_sor_exit(struct host1x_client *client) 


	tegra_output_exit(&sor->output);



	if (sor->dpaux) {

		err = tegra_dpaux_detach(sor->dpaux);

	if (sor->aux) {

		err = drm_dp_aux_detach(sor->aux);

		if (err < 0) {

			dev_err(sor->dev, "failed to detach DP: %d\n", err);

			return err;
@@ -2399,14 +2395,14 @@ static int tegra_sor_probe(struct platform_device *pdev) 


	np = of_parse_phandle(pdev->dev.of_node, "nvidia,dpaux", 0);

	if (np) {

		sor->dpaux = tegra_dpaux_find_by_of_node(np);

		sor->aux = drm_dp_aux_find_by_of_node(np);

		of_node_put(np);



		if (!sor->dpaux)

		if (!sor->aux)

			return -EPROBE_DEFER;

	}



	if (!sor->dpaux) {

	if (!sor->aux) {

		if (sor->soc->supports_hdmi) {

			sor->ops = &tegra_sor_hdmi_ops;

		} else if (sor->soc->supports_lvds) {