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Commit 944e9df1 authored by Marek Szyprowski's avatar Marek Szyprowski Committed by Russell King
Browse files

ARM: 8257/1: OMAP2+: use common l2cache initialization code 



This patch implements generic DT L2C initialisation (the one from
init_IRQ in arch/arm/kernel/irq.c) for Omap4 and AM43 platforms and
kills the SoC specific stuff in arch/arm/mach-omap2/omap4-common.c.

Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Tested-by: default avatarNishanth Menon <nm@ti.com>
Acked-by: default avatarNishanth Menon <nm@ti.com>
Acked-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 97bf6af1

arch/arm/mach-omap2/board-generic.c

+6 −0
Original line number Diff line number Diff line
@@ -171,6 +171,9 @@ static const char *const omap4_boards_compat[] __initconst = { 
};



DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")

	.l2c_aux_val	= OMAP_L2C_AUX_CTRL,

	.l2c_aux_mask	= 0xcf9fffff,

	.l2c_write_sec	= omap4_l2c310_write_sec,

	.reserve	= omap_reserve,

	.smp		= smp_ops(omap4_smp_ops),

	.map_io		= omap4_map_io,
@@ -214,6 +217,9 @@ static const char *const am43_boards_compat[] __initconst = { 
};



DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")

	.l2c_aux_val	= OMAP_L2C_AUX_CTRL,

	.l2c_aux_mask	= 0xcf9fffff,

	.l2c_write_sec	= omap4_l2c310_write_sec,

	.map_io		= am33xx_map_io,

	.init_early	= am43xx_init_early,

	.init_late	= am43xx_init_late,

arch/arm/mach-omap2/common.h

+8 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ 
#include <linux/irqchip/irq-omap-intc.h>



#include <asm/proc-fns.h>

#include <asm/hardware/cache-l2x0.h>



#include "i2c.h"

#include "serial.h"
@@ -94,11 +95,18 @@ extern void omap3_gptimer_timer_init(void); 
extern void omap4_local_timer_init(void);

#ifdef CONFIG_CACHE_L2X0

int omap_l2_cache_init(void);

#define OMAP_L2C_AUX_CTRL	(L2C_AUX_CTRL_SHARED_OVERRIDE | \

				 L310_AUX_CTRL_DATA_PREFETCH | \

				 L310_AUX_CTRL_INSTR_PREFETCH)

void omap4_l2c310_write_sec(unsigned long val, unsigned reg);

#else

static inline int omap_l2_cache_init(void)

{

	return 0;

}



#define OMAP_L2C_AUX_CTRL	0

#define omap4_l2c310_write_sec	NULL

#endif

extern void omap5_realtime_timer_init(void);

arch/arm/mach-omap2/omap4-common.c

+1 −15
Original line number Diff line number Diff line
@@ -166,7 +166,7 @@ void __iomem *omap4_get_l2cache_base(void) 
	return l2cache_base;

}



static void omap4_l2c310_write_sec(unsigned long val, unsigned reg)

void omap4_l2c310_write_sec(unsigned long val, unsigned reg)

{

	unsigned smc_op;
@@ -201,24 +201,10 @@ static void omap4_l2c310_write_sec(unsigned long val, unsigned reg) 


int __init omap_l2_cache_init(void)

{

	u32 aux_ctrl;



	/* Static mapping, never released */

	l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);

	if (WARN_ON(!l2cache_base))

		return -ENOMEM;



	/* 16-way associativity, parity disabled, way size - 64KB (es2.0 +) */

	aux_ctrl = L2C_AUX_CTRL_SHARED_OVERRIDE |

		   L310_AUX_CTRL_DATA_PREFETCH |

		   L310_AUX_CTRL_INSTR_PREFETCH;



	outer_cache.write_sec = omap4_l2c310_write_sec;

	if (of_have_populated_dt())

		l2x0_of_init(aux_ctrl, 0xcf9fffff);

	else

		l2x0_init(l2cache_base, aux_ctrl, 0xcf9fffff);



	return 0;

}

#endif