Loading arch/arm64/boot/dts/qcom/sdm845-sde.dtsi +1 −3 Original line number Diff line number Diff line Loading @@ -238,12 +238,10 @@ <&clock_gcc GCC_DISP_AHB_CLK>, <&clock_gcc GCC_DISP_AXI_CLK>, <&clock_dispcc DISP_CC_MDSS_AHB_CLK>, <&clock_dispcc DISP_CC_MDSS_ROT_CLK_SRC>, <&clock_dispcc DISP_CC_MDSS_ROT_CLK>, <&clock_dispcc DISP_CC_MDSS_AXI_CLK>; clock-names = "gcc_iface", "gcc_bus", "iface_clk", "rot_core_clk", "rot_clk", "axi_clk"; "iface_clk", "rot_clk", "axi_clk"; interrupt-parent = <&mdss_mdp>; interrupts = <2 0>; Loading Loading
arch/arm64/boot/dts/qcom/sdm845-sde.dtsi +1 −3 Original line number Diff line number Diff line Loading @@ -238,12 +238,10 @@ <&clock_gcc GCC_DISP_AHB_CLK>, <&clock_gcc GCC_DISP_AXI_CLK>, <&clock_dispcc DISP_CC_MDSS_AHB_CLK>, <&clock_dispcc DISP_CC_MDSS_ROT_CLK_SRC>, <&clock_dispcc DISP_CC_MDSS_ROT_CLK>, <&clock_dispcc DISP_CC_MDSS_AXI_CLK>; clock-names = "gcc_iface", "gcc_bus", "iface_clk", "rot_core_clk", "rot_clk", "axi_clk"; "iface_clk", "rot_clk", "axi_clk"; interrupt-parent = <&mdss_mdp>; interrupts = <2 0>; Loading