Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 91e7e454 authored by Junzhe Zou's avatar Junzhe Zou
Browse files

msm: camera: isp: start CSID with clock rate per sensor



Set CSID clock level according to sensor type.

Change-Id: Ib102b298cd3f1d07dd40d6850cd367e9b784ae86
Signed-off-by: default avatarJunzhe Zou <jnzhezou@codeaurora.org>
parent 427aa34d
Loading
Loading
Loading
Loading
+60 −1
Original line number Original line Diff line number Diff line
@@ -42,12 +42,14 @@
	(CAM_ISP_PACKET_META_GENERIC_BLOB_COMMON + 1)
	(CAM_ISP_PACKET_META_GENERIC_BLOB_COMMON + 1)


#define CAM_ISP_GENERIC_BLOB_TYPE_MAX               \
#define CAM_ISP_GENERIC_BLOB_TYPE_MAX               \
	(CAM_ISP_GENERIC_BLOB_TYPE_BW_CONFIG + 1)
	(CAM_ISP_GENERIC_BLOB_TYPE_CSID_CLOCK_CONFIG + 1)


static uint32_t blob_type_hw_cmd_map[CAM_ISP_GENERIC_BLOB_TYPE_MAX] = {
static uint32_t blob_type_hw_cmd_map[CAM_ISP_GENERIC_BLOB_TYPE_MAX] = {
	CAM_ISP_HW_CMD_GET_HFR_UPDATE,
	CAM_ISP_HW_CMD_GET_HFR_UPDATE,
	CAM_ISP_HW_CMD_CLOCK_UPDATE,
	CAM_ISP_HW_CMD_CLOCK_UPDATE,
	CAM_ISP_HW_CMD_BW_UPDATE,
	CAM_ISP_HW_CMD_BW_UPDATE,
	CAM_ISP_HW_CMD_UBWC_UPDATE,
	CAM_ISP_HW_CMD_CSID_CLOCK_UPDATE,
};
};


static struct cam_ife_hw_mgr g_ife_hw_mgr;
static struct cam_ife_hw_mgr g_ife_hw_mgr;
@@ -2481,6 +2483,53 @@ static int cam_isp_blob_hfr_update(
	return rc;
	return rc;
}
}


static int cam_isp_blob_csid_clock_update(
	uint32_t                               blob_type,
	struct cam_isp_generic_blob_info      *blob_info,
	struct cam_isp_csid_clock_config      *clock_config,
	struct cam_hw_prepare_update_args     *prepare)
{
	struct cam_ife_hw_mgr_ctx             *ctx = NULL;
	struct cam_ife_hw_mgr_res             *hw_mgr_res;
	struct cam_hw_intf                    *hw_intf;
	struct cam_ife_csid_clock_update_args  csid_clock_upd_args;
	uint64_t                               clk_rate = 0;
	int                                    rc = -EINVAL;
	uint32_t                               i;

	ctx = prepare->ctxt_to_hw_map;

	CAM_DBG(CAM_ISP,
		"csid clk=%llu", clock_config->csid_clock);

	list_for_each_entry(hw_mgr_res, &ctx->res_list_ife_csid, list) {
		for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) {
			clk_rate = 0;
			if (!hw_mgr_res->hw_res[i])
				continue;
			clk_rate = clock_config->csid_clock;
			hw_intf = hw_mgr_res->hw_res[i]->hw_intf;
			if (hw_intf && hw_intf->hw_ops.process_cmd) {
				csid_clock_upd_args.clk_rate = clk_rate;
				CAM_DBG(CAM_ISP, "i= %d clk=%llu\n",
				i, csid_clock_upd_args.clk_rate);

				rc = hw_intf->hw_ops.process_cmd(
					hw_intf->hw_priv,
					blob_type_hw_cmd_map[blob_type],
					&csid_clock_upd_args,
					sizeof(
					struct cam_ife_csid_clock_update_args));
				if (rc)
					CAM_ERR(CAM_ISP, "Clock Update failed");
			} else
				CAM_ERR(CAM_ISP, "NULL hw_intf!");
		}
	}

	return rc;
}

static int cam_isp_blob_clock_update(
static int cam_isp_blob_clock_update(
	uint32_t                               blob_type,
	uint32_t                               blob_type,
	struct cam_isp_generic_blob_info      *blob_info,
	struct cam_isp_generic_blob_info      *blob_info,
@@ -2623,6 +2672,16 @@ static int cam_isp_packet_generic_blob_handler(void *user_data,
			bw_config, sizeof(prepare_hw_data->bw_config[0]));
			bw_config, sizeof(prepare_hw_data->bw_config[0]));
		prepare_hw_data->bw_config_valid[bw_config->usage_type] = true;
		prepare_hw_data->bw_config_valid[bw_config->usage_type] = true;


	}
		break;
	case CAM_ISP_GENERIC_BLOB_TYPE_CSID_CLOCK_CONFIG: {
		struct cam_isp_csid_clock_config    *clock_config =
			(struct cam_isp_csid_clock_config *)blob_data;

		rc = cam_isp_blob_csid_clock_update(blob_type, blob_info,
			clock_config, prepare);
		if (rc)
			CAM_ERR(CAM_ISP, "Clock Update Failed");
	}
	}
		break;
		break;
	default:
	default:
+28 −2
Original line number Original line Diff line number Diff line
@@ -938,7 +938,7 @@ static int cam_ife_csid_enable_hw(struct cam_ife_csid_hw *csid_hw)
	int rc = 0;
	int rc = 0;
	struct cam_ife_csid_reg_offset      *csid_reg;
	struct cam_ife_csid_reg_offset      *csid_reg;
	struct cam_hw_soc_info              *soc_info;
	struct cam_hw_soc_info              *soc_info;
	uint32_t i, val;
	uint32_t i, val, clk_lvl;


	csid_reg = csid_hw->csid_info->csid_reg;
	csid_reg = csid_hw->csid_info->csid_reg;
	soc_info = &csid_hw->hw_info->soc_info;
	soc_info = &csid_hw->hw_info->soc_info;
@@ -960,7 +960,10 @@ static int cam_ife_csid_enable_hw(struct cam_ife_csid_hw *csid_hw)
	CAM_DBG(CAM_ISP, "CSID:%d init CSID HW",
	CAM_DBG(CAM_ISP, "CSID:%d init CSID HW",
		csid_hw->hw_intf->hw_idx);
		csid_hw->hw_intf->hw_idx);


	rc = cam_ife_csid_enable_soc_resources(soc_info);
	clk_lvl = cam_ife_csid_get_vote_level(soc_info, csid_hw->clk_rate);
	CAM_DBG(CAM_ISP, "CSID clock lvl %u", clk_lvl);

	rc = cam_ife_csid_enable_soc_resources(soc_info, clk_lvl);
	if (rc) {
	if (rc) {
		CAM_ERR(CAM_ISP, "CSID:%d Enable SOC failed",
		CAM_ERR(CAM_ISP, "CSID:%d Enable SOC failed",
			csid_hw->hw_intf->hw_idx);
			csid_hw->hw_intf->hw_idx);
@@ -2194,6 +2197,9 @@ static int cam_ife_csid_reserve(void *hw_priv,
	csid_hw = (struct cam_ife_csid_hw   *)csid_hw_info->core_info;
	csid_hw = (struct cam_ife_csid_hw   *)csid_hw_info->core_info;
	reserv = (struct cam_csid_hw_reserve_resource_args  *)reserve_args;
	reserv = (struct cam_csid_hw_reserve_resource_args  *)reserve_args;


	CAM_DBG(CAM_ISP, "res_type %d, CSID: %u",
		reserv->res_type, csid_hw->hw_intf->hw_idx);

	mutex_lock(&csid_hw->hw_info->hw_mutex);
	mutex_lock(&csid_hw->hw_info->hw_mutex);
	switch (reserv->res_type) {
	switch (reserv->res_type) {
	case CAM_ISP_RESOURCE_CID:
	case CAM_ISP_RESOURCE_CID:
@@ -2678,6 +2684,23 @@ static int cam_ife_csid_sof_irq_debug(
	return 0;
	return 0;
}
}


static int cam_ife_csid_set_csid_clock(
	struct cam_ife_csid_hw *csid_hw, void *cmd_args)
{
	struct cam_ife_csid_clock_update_args *clk_update = NULL;

	if (!csid_hw)
		return -EINVAL;

	clk_update =
		(struct cam_ife_csid_clock_update_args *)cmd_args;

	csid_hw->clk_rate = clk_update->clk_rate;
	CAM_INFO(CAM_ISP, "CSID clock rate %llu", csid_hw->clk_rate);

	return 0;
}

static int cam_ife_csid_process_cmd(void *hw_priv,
static int cam_ife_csid_process_cmd(void *hw_priv,
	uint32_t cmd_type, void *cmd_args, uint32_t arg_size)
	uint32_t cmd_type, void *cmd_args, uint32_t arg_size)
{
{
@@ -2709,6 +2732,9 @@ static int cam_ife_csid_process_cmd(void *hw_priv,
	case CAM_IFE_CSID_SOF_IRQ_DEBUG:
	case CAM_IFE_CSID_SOF_IRQ_DEBUG:
		rc = cam_ife_csid_sof_irq_debug(csid_hw, cmd_args);
		rc = cam_ife_csid_sof_irq_debug(csid_hw, cmd_args);
		break;
		break;
	case CAM_ISP_HW_CMD_CLOCK_UPDATE:
		rc = cam_ife_csid_set_csid_clock(csid_hw, cmd_args);
		break;
	default:
	default:
		CAM_ERR(CAM_ISP, "CSID:%d unsupported cmd:%d",
		CAM_ERR(CAM_ISP, "CSID:%d unsupported cmd:%d",
			csid_hw->hw_intf->hw_idx, cmd_type);
			csid_hw->hw_intf->hw_idx, cmd_type);
+18 −2
Original line number Original line Diff line number Diff line
@@ -116,7 +116,8 @@ int cam_ife_csid_deinit_soc_resources(
	return rc;
	return rc;
}
}


int cam_ife_csid_enable_soc_resources(struct cam_hw_soc_info *soc_info)
int cam_ife_csid_enable_soc_resources(
	struct cam_hw_soc_info *soc_info, uint32_t clk_lvl)
{
{
	int rc = 0;
	int rc = 0;
	struct cam_csid_soc_private       *soc_private;
	struct cam_csid_soc_private       *soc_private;
@@ -141,7 +142,7 @@ int cam_ife_csid_enable_soc_resources(struct cam_hw_soc_info *soc_info)
	}
	}


	rc = cam_soc_util_enable_platform_resource(soc_info, true,
	rc = cam_soc_util_enable_platform_resource(soc_info, true,
		CAM_SVS_VOTE, true);
		clk_lvl, true);
	if (rc) {
	if (rc) {
		CAM_ERR(CAM_ISP, "enable platform failed");
		CAM_ERR(CAM_ISP, "enable platform failed");
		goto stop_cpas;
		goto stop_cpas;
@@ -235,3 +236,18 @@ int cam_ife_csid_disable_ife_force_clock_on(struct cam_hw_soc_info *soc_info,
	return rc;
	return rc;
}
}


uint32_t cam_ife_csid_get_vote_level(struct cam_hw_soc_info *soc_info,
	uint64_t clock_rate)
{
	int i = 0;

	if (!clock_rate)
		return CAM_SVS_VOTE;

	for (i = 0; i < CAM_MAX_VOTE; i++) {
		if (soc_info->clk_rate[i][soc_info->num_clk - 1] >= clock_rate)
			return i;
	}

	return CAM_TURBO_VOTE;
}
+15 −3
Original line number Original line Diff line number Diff line
/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
 *
 *
 * This program is free software; you can redistribute it and/or modify
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * it under the terms of the GNU General Public License version 2 and
@@ -68,9 +68,11 @@ int cam_ife_csid_deinit_soc_resources(struct cam_hw_soc_info *soc_info);
 * @brief:                 csid soc resource enable function
 * @brief:                 csid soc resource enable function
 *
 *
 * @soc_info:              soc info structure pointer
 * @soc_info:              soc info structure pointer
 * @clk_lvl:               vote level to start with
 *
 *
 */
 */
int cam_ife_csid_enable_soc_resources(struct cam_hw_soc_info  *soc_info);
int cam_ife_csid_enable_soc_resources(struct cam_hw_soc_info  *soc_info,
	uint32_t clk_lvl);


/**
/**
 * cam_ife_csid_disable_soc_resources()
 * cam_ife_csid_disable_soc_resources()
@@ -109,6 +111,16 @@ int cam_ife_csid_enable_ife_force_clock_on(struct cam_hw_soc_info *soc_info,
int cam_ife_csid_disable_ife_force_clock_on(struct cam_hw_soc_info *soc_info,
int cam_ife_csid_disable_ife_force_clock_on(struct cam_hw_soc_info *soc_info,
	uint32_t cpas_ife_base_offset);
	uint32_t cpas_ife_base_offset);



/**
 * cam_ife_csid_get_vote_level()
 *
 * @brief:                 get the vote level from clock rate
 *
 * @soc_info:              soc info structure pointer
 * @clock_rate             clock rate
 *
 */
uint32_t cam_ife_csid_get_vote_level(struct cam_hw_soc_info *soc_info,
	uint64_t clock_rate);


#endif
#endif
+10 −0
Original line number Original line Diff line number Diff line
@@ -168,4 +168,14 @@ enum cam_ife_csid_cmd_type {
int cam_ife_csid_hw_init(struct cam_hw_intf **ife_csid_hw,
int cam_ife_csid_hw_init(struct cam_hw_intf **ife_csid_hw,
	uint32_t hw_idx);
	uint32_t hw_idx);


/*
 * struct cam_ife_csid_clock_update_args:
 *
 * @clk_rate:                Clock rate requested
 */
struct cam_ife_csid_clock_update_args {
	uint64_t                           clk_rate;
};


#endif /* _CAM_CSID_HW_INTF_H_ */
#endif /* _CAM_CSID_HW_INTF_H_ */
Loading