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Commit 916a0fe7 authored by Jeremy Fitzhardinge's avatar Jeremy Fitzhardinge
Browse files

x86/ioapic.c: remove #ifdef for 82093AA workaround 



While no 64-bit hardware will have a version 0x11 I/O APIC which needs
the level/edge bug workaround, that's not a particular reason to use
CONFIG_X86_32 to #ifdef the code out.  Most 32-bit machines will no
longer need the workaround either, so the test to see whether it is
necessary should be more fine-grained than "32-bit=yes, 64-bit=no".

(Also fix formatting of block comment.)

Signed-off-by: default avatarJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
parent 890aeacf

arch/x86/kernel/apic/io_apic.c

+19 −28
Original line number Diff line number Diff line
@@ -596,7 +596,6 @@ static void __mask_IO_APIC_irq(struct irq_cfg *cfg) 
	io_apic_modify_irq(cfg, ~0, IO_APIC_REDIR_MASKED, &io_apic_sync);

}



#ifdef CONFIG_X86_32

static void __mask_and_edge_IO_APIC_irq(struct irq_cfg *cfg)

{

	io_apic_modify_irq(cfg, ~IO_APIC_REDIR_LEVEL_TRIGGER,
@@ -608,7 +607,6 @@ static void __unmask_and_level_IO_APIC_irq(struct irq_cfg *cfg) 
	io_apic_modify_irq(cfg, ~IO_APIC_REDIR_MASKED,

			IO_APIC_REDIR_LEVEL_TRIGGER, NULL);

}

#endif /* CONFIG_X86_32 */



static void mask_IO_APIC_irq_desc(struct irq_desc *desc)

{
@@ -2510,11 +2508,8 @@ atomic_t irq_mis_count; 
static void ack_apic_level(unsigned int irq)

{

	struct irq_desc *desc = irq_to_desc(irq);



#ifdef CONFIG_X86_32

	unsigned long v;

	int i;

#endif

	struct irq_cfg *cfg;

	int do_unmask_irq = 0;
@@ -2527,7 +2522,6 @@ static void ack_apic_level(unsigned int irq) 
	}

#endif



#ifdef CONFIG_X86_32

	/*

	 * It appears there is an erratum which affects at least version 0x11

	 * of I/O APIC (that's the 82093AA and cores integrated into various
@@ -2549,9 +2543,7 @@ static void ack_apic_level(unsigned int irq) 
	 */

	cfg = desc->chip_data;

	i = cfg->vector;



	v = apic_read(APIC_TMR + ((i & ~0x1f) >> 1));

#endif



	/*

	 * We must acknowledge the irq before we move it or the acknowledge will
@@ -2593,7 +2585,7 @@ static void ack_apic_level(unsigned int irq) 
		unmask_IO_APIC_irq_desc(desc);

	}



#ifdef CONFIG_X86_32

	/* Tail end of version 0x11 I/O APIC bug workaround */

	if (!(v & (1 << (i & 0x1f)))) {

		atomic_inc(&irq_mis_count);

		spin_lock(&ioapic_lock);
@@ -2601,7 +2593,6 @@ static void ack_apic_level(unsigned int irq) 
		__unmask_and_level_IO_APIC_irq(cfg);

		spin_unlock(&ioapic_lock);

	}

#endif

}



#ifdef CONFIG_INTR_REMAP