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Commit 8fe9346b authored by Soren Brinkmann's avatar Soren Brinkmann Committed by Michal Simek
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ARM: zynq: DT: Migrate UART to Cadence binding 



The Zynq UART is Cadence IP and the driver has been renamed accordingly.
Migrate the DT to use the new binding for the UART driver.

Signed-off-by: default avatarSoren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: default avatarPeter Crosthwaite <peter.crosthwaite@xilinx.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Tested-by: default avatarMichal Simek <michal.simek@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent db34d2b3

arch/arm/boot/dts/zynq-7000.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -105,19 +105,19 @@ 
		};



		uart0: serial@e0000000 {

			compatible = "xlnx,xuartps";

			compatible = "xlnx,xuartps", "cdns,uart-r1p8";

			status = "disabled";

			clocks = <&clkc 23>, <&clkc 40>;

			clock-names = "ref_clk", "aper_clk";

			clock-names = "uart_clk", "pclk";

			reg = <0xE0000000 0x1000>;

			interrupts = <0 27 4>;

		};



		uart1: serial@e0001000 {

			compatible = "xlnx,xuartps";

			compatible = "xlnx,xuartps", "cdns,uart-r1p8";

			status = "disabled";

			clocks = <&clkc 24>, <&clkc 41>;

			clock-names = "ref_clk", "aper_clk";

			clock-names = "uart_clk", "pclk";

			reg = <0xE0001000 0x1000>;

			interrupts = <0 50 4>;

		};