Commit 8f89b17c authored Oct 15, 2018 by Mao Jinlong

ARM: dts: msm: Correct dcc ram offset size for sdxpoorwills



SDI will use the first 1k size of the sram. Dcc will use the reset of
the size.

Change-Id: Ie9519da1bc7639f6b220316c88470ad0e3a1802f
Signed-off-by: Mao Jinlong <jinlmao@codeaurora.org>

parent 8f25c5b6

arch/arm/boot/dts/qcom/sdxpoorwills.dtsi

+2 −2

Original line number	Diff line number	Diff line
		@@ -908,10 +908,10 @@
		dcc: dcc_v2@10a2000 {
		compatible = "qcom,dcc-v2";
		reg = <0x10a2000 0x1000>,
		<0x10ae000 0x2000>;
		<0x10ae400 0x1c00>;
		reg-names = "dcc-base", "dcc-ram-base";

		dcc-ram-offset = <0x6000>;
		dcc-ram-offset = <0x400>;
		};

		system_pm {