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Commit 8f0195d2 authored by Qiwei Liu's avatar Qiwei Liu Committed by Gerrit - the friendly Code Review server
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msm: vidc: refine encoder workload calc 



1. For HFR case, use operation rate instead of fps to
calculate the real workload for vsp.
2. Adjust vsp workload for 2 core case.

Change-Id: I824db8aa7142fbb47c5cfae9a44fe5aed415af0f
Signed-off-by: default avatarQiwei Liu <qiweil@codeaurora.org>
parent 202aa1fb

drivers/media/platform/msm/vidc/msm_vidc_clocks.c

+14 −2
Original line number Diff line number Diff line
@@ -605,6 +605,7 @@ static unsigned long msm_vidc_calc_freq(struct msm_vidc_inst *inst, 
	struct allowed_clock_rates_table *allowed_clks_tbl = NULL;

	u64 rate = 0;

	struct clock_data *dcvs = NULL;

	u32 operating_rate, vsp_factor_num = 10, vsp_factor_den = 7;



	core = inst->core;

	dcvs = &inst->clk_data;
@@ -627,8 +628,19 @@ static unsigned long msm_vidc_calc_freq(struct msm_vidc_inst *inst, 


		vsp_cycles = mbs_per_second * inst->clk_data.entry->vsp_cycles;



		/* 10 / 7 is overhead factor */

		vsp_cycles += (inst->clk_data.bitrate * 10) / 7;

		operating_rate = inst->clk_data.operating_rate >> 16;

		if (operating_rate > inst->prop.fps && inst->prop.fps) {

			vsp_factor_num *= operating_rate;

			vsp_factor_den *= inst->prop.fps;

		}

		//adjust factor for 2 core case, due to workload is not

		//equally distributed on 2 cores, use 0.65 instead of 0.5

		if (inst->clk_data.core_id == VIDC_CORE_ID_3) {

			vsp_factor_num = vsp_factor_num * 13 / 10;

			vsp_factor_den *= 2;

		}

		vsp_cycles += ((u64)inst->clk_data.bitrate * vsp_factor_num) /

				vsp_factor_den;

	} else if (inst->session_type == MSM_VIDC_DECODER) {

		vpp_cycles = mbs_per_second * inst->clk_data.entry->vpp_cycles;