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Commit 8e9fbeb5 authored by Chunming Zhou's avatar Chunming Zhou Committed by Alex Deucher
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drm/amdgpu: improve vmid assigment V2



V2: the signaled items on the LRU maintain their order

Signed-off-by: default avatarChunming Zhou <David1.Zhou@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent eca2240f
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+14 −0
Original line number Diff line number Diff line
@@ -216,6 +216,20 @@ int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
				      struct amdgpu_vm_manager_id,
				      list);

	if (id->mgr_id->active && !fence_is_signaled(id->mgr_id->active)) {
		struct amdgpu_vm_manager_id *mgr_id, *tmp;
		struct list_head *head = &adev->vm_manager.ids_lru;
		list_for_each_entry_safe(mgr_id, tmp, &adev->vm_manager.ids_lru, list) {
			if (mgr_id->active && fence_is_signaled(mgr_id->active)) {
				list_move(&mgr_id->list, head);
				head = &mgr_id->list;
			}
		}
		id->mgr_id = list_first_entry(&adev->vm_manager.ids_lru,
					      struct amdgpu_vm_manager_id,
					      list);
	}

	r = amdgpu_sync_fence(ring->adev, sync, id->mgr_id->active);
	if (!r) {
		fence_put(id->mgr_id->active);