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Commit 8e3dae2b authored by David Fries's avatar David Fries Committed by Linus Torvalds
Browse files

W1: w1_io.c reset comments and msleep 



w1_reset_bus, added some comments about the timing and switched to msleep
for the later delay.  I don't have the hardware to test the sleep after
reset change.  The one wire doesn't have a timing requirement between
commands so it is fine.  I do have the USB hardware and it would be in big
trouble with 10ms interrupt transfers to find that the reset completed.

Signed-off-by: default avatarDavid Fries <david@fries.net>
Signed-off-by: default avatarEvgeniy Polyakov <johnpol@2ka.mipt.ru>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 7dc8f527

drivers/w1/w1_io.c

+13 −1
Original line number Diff line number Diff line
@@ -293,12 +293,24 @@ int w1_reset_bus(struct w1_master *dev) 
		result = dev->bus_master->reset_bus(dev->bus_master->data) & 0x1;

	else {

		dev->bus_master->write_bit(dev->bus_master->data, 0);

		/* minimum 480, max ? us

		 * be nice and sleep, except 18b20 spec lists 960us maximum,

		 * so until we can sleep with microsecond accuracy, spin.

		 * Feel free to come up with some other way to give up the

		 * cpu for such a short amount of time AND get it back in

		 * the maximum amount of time.

		 */

		w1_delay(480);

		dev->bus_master->write_bit(dev->bus_master->data, 1);

		w1_delay(70);



		result = dev->bus_master->read_bit(dev->bus_master->data) & 0x1;

		w1_delay(410);

		/* minmum 70 (above) + 410 = 480 us

		 * There aren't any timing requirements between a reset and

		 * the following transactions.  Sleeping is safe here.

		 */

		/* w1_delay(410); min required time */

		msleep(1);

	}



	return result;