Loading arch/arm/Kconfig +36 −1 Original line number Diff line number Diff line Loading @@ -180,6 +180,7 @@ config ARCH_OMAP config ARCH_VERSATILE bool "Versatile" select ARM_AMBA select ARM_VIC select ICST307 help This enables support for ARM Ltd Versatile board. Loading Loading @@ -400,6 +401,38 @@ config NO_IDLE_HZ Currently at least OMAP, PXA2xx and SA11x0 platforms are known to have accurate timekeeping with dynamic tick. config AEABI bool "Use the ARM EABI to compile the kernel" help This option allows for the kernel to be compiled using the latest ARM ABI (aka EABI). This is only useful if you are using a user space environment that is also compiled with EABI. Since there are major incompatibilities between the legacy ABI and EABI, especially with regard to structure member alignment, this option also changes the kernel syscall calling convention to disambiguate both ABIs and allow for backward compatibility support (selected with CONFIG_OABI_COMPAT). To use this you need GCC version 4.0.0 or later. config OABI_COMPAT bool "Allow old ABI binaries to run with this kernel" depends on AEABI default y help This option preserves the old syscall interface along with the new (ARM EABI) one. It also provides a compatibility layer to intercept syscalls that have structure arguments which layout in memory differs between the legacy ABI and the new ARM EABI (only for non "thumb" binaries). This option adds a tiny overhead to all syscalls and produces a slightly larger kernel. If you know you'll be using only pure EABI user space then you can say N here. If this option is not selected and you attempt to execute a legacy ABI binary then the result will be UNPREDICTABLE (in fact it can be predicted that it won't work at all). If in doubt say Y. config ARCH_DISCONTIGMEM_ENABLE bool default (ARCH_LH7A40X && !LH7A40X_CONTIGMEM) Loading Loading @@ -586,6 +619,7 @@ comment "At least one emulation must be selected" config FPE_NWFPE bool "NWFPE math emulation" depends on !AEABI || OABI_COMPAT ---help--- Say Y to include the NWFPE floating point emulator in the kernel. This is necessary to run most binaries. Linux does not currently Loading @@ -609,7 +643,7 @@ config FPE_NWFPE_XP config FPE_FASTFPE bool "FastFPE math emulation (EXPERIMENTAL)" depends on !CPU_32v3 && EXPERIMENTAL depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL ---help--- Say Y here to include the FAST floating point emulator in the kernel. This is an experimental much faster emulator which now also has full Loading Loading @@ -641,6 +675,7 @@ source "fs/Kconfig.binfmt" config ARTHUR tristate "RISC OS personality" depends on !AEABI help Say Y here to include the kernel code necessary if you want to run Acorn RISC OS/Arthur binaries under Linux. This code is still very Loading arch/arm/Makefile +6 −1 Original line number Diff line number Diff line Loading @@ -56,8 +56,13 @@ tune-$(CONFIG_CPU_SA1100) :=-mtune=strongarm1100 tune-$(CONFIG_CPU_XSCALE) :=$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale tune-$(CONFIG_CPU_V6) :=$(call cc-option,-mtune=arm1136j-s,-mtune=strongarm) # Need -Uarm for gcc < 3.x ifeq ($(CONFIG_AEABI),y) CFLAGS_ABI :=-mabi=aapcs -mno-thumb-interwork else CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) $(call cc-option,-mno-thumb-interwork,) endif # Need -Uarm for gcc < 3.x CFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm AFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float Loading arch/arm/common/Kconfig +5 −2 Original line number Diff line number Diff line config ICST525 config ARM_GIC bool config ARM_GIC config ARM_VIC bool config ICST525 bool config ICST307 Loading arch/arm/common/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -4,6 +4,7 @@ obj-y += rtctime.o obj-$(CONFIG_ARM_GIC) += gic.o obj-$(CONFIG_ARM_VIC) += vic.o obj-$(CONFIG_ICST525) += icst525.o obj-$(CONFIG_ICST307) += icst307.o obj-$(CONFIG_SA1111) += sa1111.o Loading arch/arm/common/vic.c 0 → 100644 +92 −0 Original line number Diff line number Diff line /* * linux/arch/arm/common/vic.c * * Copyright (C) 1999 - 2003 ARM Limited * Copyright (C) 2000 Deep Blue Solutions Ltd * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/init.h> #include <linux/list.h> #include <asm/io.h> #include <asm/irq.h> #include <asm/mach/irq.h> #include <asm/hardware/vic.h> static void __iomem *vic_base; static void vic_mask_irq(unsigned int irq) { irq -= IRQ_VIC_START; writel(1 << irq, vic_base + VIC_INT_ENABLE_CLEAR); } static void vic_unmask_irq(unsigned int irq) { irq -= IRQ_VIC_START; writel(1 << irq, vic_base + VIC_INT_ENABLE); } static struct irqchip vic_chip = { .ack = vic_mask_irq, .mask = vic_mask_irq, .unmask = vic_unmask_irq, }; void __init vic_init(void __iomem *base, u32 vic_sources) { unsigned int i; vic_base = base; /* Disable all interrupts initially. */ writel(0, vic_base + VIC_INT_SELECT); writel(0, vic_base + VIC_INT_ENABLE); writel(~0, vic_base + VIC_INT_ENABLE_CLEAR); writel(0, vic_base + VIC_IRQ_STATUS); writel(0, vic_base + VIC_ITCR); writel(~0, vic_base + VIC_INT_SOFT_CLEAR); /* * Make sure we clear all existing interrupts */ writel(0, vic_base + VIC_VECT_ADDR); for (i = 0; i < 19; i++) { unsigned int value; value = readl(vic_base + VIC_VECT_ADDR); writel(value, vic_base + VIC_VECT_ADDR); } for (i = 0; i < 16; i++) { void __iomem *reg = vic_base + VIC_VECT_CNTL0 + (i * 4); writel(VIC_VECT_CNTL_ENABLE | i, reg); } writel(32, vic_base + VIC_DEF_VECT_ADDR); for (i = 0; i < 32; i++) { unsigned int irq = IRQ_VIC_START + i; set_irq_chip(irq, &vic_chip); if (vic_sources & (1 << i)) { set_irq_handler(irq, do_level_IRQ); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } } Loading
arch/arm/Kconfig +36 −1 Original line number Diff line number Diff line Loading @@ -180,6 +180,7 @@ config ARCH_OMAP config ARCH_VERSATILE bool "Versatile" select ARM_AMBA select ARM_VIC select ICST307 help This enables support for ARM Ltd Versatile board. Loading Loading @@ -400,6 +401,38 @@ config NO_IDLE_HZ Currently at least OMAP, PXA2xx and SA11x0 platforms are known to have accurate timekeeping with dynamic tick. config AEABI bool "Use the ARM EABI to compile the kernel" help This option allows for the kernel to be compiled using the latest ARM ABI (aka EABI). This is only useful if you are using a user space environment that is also compiled with EABI. Since there are major incompatibilities between the legacy ABI and EABI, especially with regard to structure member alignment, this option also changes the kernel syscall calling convention to disambiguate both ABIs and allow for backward compatibility support (selected with CONFIG_OABI_COMPAT). To use this you need GCC version 4.0.0 or later. config OABI_COMPAT bool "Allow old ABI binaries to run with this kernel" depends on AEABI default y help This option preserves the old syscall interface along with the new (ARM EABI) one. It also provides a compatibility layer to intercept syscalls that have structure arguments which layout in memory differs between the legacy ABI and the new ARM EABI (only for non "thumb" binaries). This option adds a tiny overhead to all syscalls and produces a slightly larger kernel. If you know you'll be using only pure EABI user space then you can say N here. If this option is not selected and you attempt to execute a legacy ABI binary then the result will be UNPREDICTABLE (in fact it can be predicted that it won't work at all). If in doubt say Y. config ARCH_DISCONTIGMEM_ENABLE bool default (ARCH_LH7A40X && !LH7A40X_CONTIGMEM) Loading Loading @@ -586,6 +619,7 @@ comment "At least one emulation must be selected" config FPE_NWFPE bool "NWFPE math emulation" depends on !AEABI || OABI_COMPAT ---help--- Say Y to include the NWFPE floating point emulator in the kernel. This is necessary to run most binaries. Linux does not currently Loading @@ -609,7 +643,7 @@ config FPE_NWFPE_XP config FPE_FASTFPE bool "FastFPE math emulation (EXPERIMENTAL)" depends on !CPU_32v3 && EXPERIMENTAL depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL ---help--- Say Y here to include the FAST floating point emulator in the kernel. This is an experimental much faster emulator which now also has full Loading Loading @@ -641,6 +675,7 @@ source "fs/Kconfig.binfmt" config ARTHUR tristate "RISC OS personality" depends on !AEABI help Say Y here to include the kernel code necessary if you want to run Acorn RISC OS/Arthur binaries under Linux. This code is still very Loading
arch/arm/Makefile +6 −1 Original line number Diff line number Diff line Loading @@ -56,8 +56,13 @@ tune-$(CONFIG_CPU_SA1100) :=-mtune=strongarm1100 tune-$(CONFIG_CPU_XSCALE) :=$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale tune-$(CONFIG_CPU_V6) :=$(call cc-option,-mtune=arm1136j-s,-mtune=strongarm) # Need -Uarm for gcc < 3.x ifeq ($(CONFIG_AEABI),y) CFLAGS_ABI :=-mabi=aapcs -mno-thumb-interwork else CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) $(call cc-option,-mno-thumb-interwork,) endif # Need -Uarm for gcc < 3.x CFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm AFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float Loading
arch/arm/common/Kconfig +5 −2 Original line number Diff line number Diff line config ICST525 config ARM_GIC bool config ARM_GIC config ARM_VIC bool config ICST525 bool config ICST307 Loading
arch/arm/common/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -4,6 +4,7 @@ obj-y += rtctime.o obj-$(CONFIG_ARM_GIC) += gic.o obj-$(CONFIG_ARM_VIC) += vic.o obj-$(CONFIG_ICST525) += icst525.o obj-$(CONFIG_ICST307) += icst307.o obj-$(CONFIG_SA1111) += sa1111.o Loading
arch/arm/common/vic.c 0 → 100644 +92 −0 Original line number Diff line number Diff line /* * linux/arch/arm/common/vic.c * * Copyright (C) 1999 - 2003 ARM Limited * Copyright (C) 2000 Deep Blue Solutions Ltd * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/init.h> #include <linux/list.h> #include <asm/io.h> #include <asm/irq.h> #include <asm/mach/irq.h> #include <asm/hardware/vic.h> static void __iomem *vic_base; static void vic_mask_irq(unsigned int irq) { irq -= IRQ_VIC_START; writel(1 << irq, vic_base + VIC_INT_ENABLE_CLEAR); } static void vic_unmask_irq(unsigned int irq) { irq -= IRQ_VIC_START; writel(1 << irq, vic_base + VIC_INT_ENABLE); } static struct irqchip vic_chip = { .ack = vic_mask_irq, .mask = vic_mask_irq, .unmask = vic_unmask_irq, }; void __init vic_init(void __iomem *base, u32 vic_sources) { unsigned int i; vic_base = base; /* Disable all interrupts initially. */ writel(0, vic_base + VIC_INT_SELECT); writel(0, vic_base + VIC_INT_ENABLE); writel(~0, vic_base + VIC_INT_ENABLE_CLEAR); writel(0, vic_base + VIC_IRQ_STATUS); writel(0, vic_base + VIC_ITCR); writel(~0, vic_base + VIC_INT_SOFT_CLEAR); /* * Make sure we clear all existing interrupts */ writel(0, vic_base + VIC_VECT_ADDR); for (i = 0; i < 19; i++) { unsigned int value; value = readl(vic_base + VIC_VECT_ADDR); writel(value, vic_base + VIC_VECT_ADDR); } for (i = 0; i < 16; i++) { void __iomem *reg = vic_base + VIC_VECT_CNTL0 + (i * 4); writel(VIC_VECT_CNTL_ENABLE | i, reg); } writel(32, vic_base + VIC_DEF_VECT_ADDR); for (i = 0; i < 32; i++) { unsigned int irq = IRQ_VIC_START + i; set_irq_chip(irq, &vic_chip); if (vic_sources & (1 << i)) { set_irq_handler(irq, do_level_IRQ); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } }