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Commit 8ce14a22 authored by Joonyoung Shim's avatar Joonyoung Shim Committed by Kukjin Kim
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ARM: SAMSUNG: Add common samsung_gpiolib_to_irq function 



This patch adds a common callback for gpio_to_irq() for external and
gpio interrupts for Samsung SoCs.

Signed-off-by: default avatarJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: moved samsung_gpiolib_to_irq() for s3c24xx build]
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 02c38497

arch/arm/mach-s3c64xx/gpiolib.c

+2 −6
Original line number Original line Diff line number Diff line
@@ -195,11 +195,6 @@ static struct s3c_gpio_cfg gpio_2bit_cfg_eint11 = { 
	.get_pull	= s3c_gpio_getpull_updown,

	.get_pull	= s3c_gpio_getpull_updown,

};

};





int s3c64xx_gpio2int_gpn(struct gpio_chip *chip, unsigned pin)

{

	return IRQ_EINT(0) + pin;

}



static struct s3c_gpio_chip gpio_2bit[] = {

static struct s3c_gpio_chip gpio_2bit[] = {

	{

	{

		.base	= S3C64XX_GPF_BASE,

		.base	= S3C64XX_GPF_BASE,
@@ -227,12 +222,13 @@ static struct s3c_gpio_chip gpio_2bit[] = { 
		},

		},

	}, {

	}, {

		.base	= S3C64XX_GPN_BASE,

		.base	= S3C64XX_GPN_BASE,

		.irq_base = IRQ_EINT(0),

		.config	= &gpio_2bit_cfg_eint10,

		.config	= &gpio_2bit_cfg_eint10,

		.chip	= {

		.chip	= {

			.base	= S3C64XX_GPN(0),

			.base	= S3C64XX_GPN(0),

			.ngpio	= S3C64XX_GPIO_N_NR,

			.ngpio	= S3C64XX_GPIO_N_NR,

			.label	= "GPN",

			.label	= "GPN",

			.to_irq = s3c64xx_gpio2int_gpn,

			.to_irq = samsung_gpiolib_to_irq,

		},

		},

	}, {

	}, {

		.base	= S3C64XX_GPO_BASE,

		.base	= S3C64XX_GPO_BASE,

arch/arm/mach-s5pc100/gpiolib.c

+8 −23
Original line number Original line Diff line number Diff line
@@ -61,25 +61,6 @@ 
 * L3	8	4Bit	None

 * L3	8	4Bit	None

 */

 */





static int s5pc100_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset)

{

	int base;



	base = chip->base - S5PC100_GPH0(0);

	if (base == 0)

		return IRQ_EINT(offset);

	base = chip->base - S5PC100_GPH1(0);

	if (base == 0)

		return IRQ_EINT(8 + offset);

	base = chip->base - S5PC100_GPH2(0);

	if (base == 0)

		return IRQ_EINT(16 + offset);

	base = chip->base - S5PC100_GPH3(0);

	if (base == 0)

		return IRQ_EINT(24 + offset);

	return -EINVAL;

}



static struct s3c_gpio_cfg gpio_cfg = {

static struct s3c_gpio_cfg gpio_cfg = {

	.set_config	= s3c_gpio_setcfg_s3c64xx_4bit,

	.set_config	= s3c_gpio_setcfg_s3c64xx_4bit,

	.set_pull	= s3c_gpio_setpull_updown,

	.set_pull	= s3c_gpio_setpull_updown,
@@ -223,38 +204,42 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = { 
	}, {

	}, {

		.base	= S5PC100_GPH0_BASE,

		.base	= S5PC100_GPH0_BASE,

		.config	= &gpio_cfg_eint,

		.config	= &gpio_cfg_eint,

		.irq_base = IRQ_EINT(0),

		.chip	= {

		.chip	= {

			.base	= S5PC100_GPH0(0),

			.base	= S5PC100_GPH0(0),

			.ngpio	= S5PC100_GPIO_H0_NR,

			.ngpio	= S5PC100_GPIO_H0_NR,

			.label	= "GPH0",

			.label	= "GPH0",

			.to_irq = s5pc100_gpiolib_to_eint,

			.to_irq = samsung_gpiolib_to_irq,

		},

		},

	}, {

	}, {

		.base	= S5PC100_GPH1_BASE,

		.base	= S5PC100_GPH1_BASE,

		.config	= &gpio_cfg_eint,

		.config	= &gpio_cfg_eint,

		.irq_base = IRQ_EINT(8),

		.chip	= {

		.chip	= {

			.base	= S5PC100_GPH1(0),

			.base	= S5PC100_GPH1(0),

			.ngpio	= S5PC100_GPIO_H1_NR,

			.ngpio	= S5PC100_GPIO_H1_NR,

			.label	= "GPH1",

			.label	= "GPH1",

			.to_irq = s5pc100_gpiolib_to_eint,

			.to_irq = samsung_gpiolib_to_irq,

		},

		},

	}, {

	}, {

		.base	= S5PC100_GPH2_BASE,

		.base	= S5PC100_GPH2_BASE,

		.config	= &gpio_cfg_eint,

		.config	= &gpio_cfg_eint,

		.irq_base = IRQ_EINT(16),

		.chip	= {

		.chip	= {

			.base	= S5PC100_GPH2(0),

			.base	= S5PC100_GPH2(0),

			.ngpio	= S5PC100_GPIO_H2_NR,

			.ngpio	= S5PC100_GPIO_H2_NR,

			.label	= "GPH2",

			.label	= "GPH2",

			.to_irq = s5pc100_gpiolib_to_eint,

			.to_irq = samsung_gpiolib_to_irq,

		},

		},

	}, {

	}, {

		.base	= S5PC100_GPH3_BASE,

		.base	= S5PC100_GPH3_BASE,

		.config	= &gpio_cfg_eint,

		.config	= &gpio_cfg_eint,

		.irq_base = IRQ_EINT(24),

		.chip	= {

		.chip	= {

			.base	= S5PC100_GPH3(0),

			.base	= S5PC100_GPH3(0),

			.ngpio	= S5PC100_GPIO_H3_NR,

			.ngpio	= S5PC100_GPIO_H3_NR,

			.label	= "GPH3",

			.label	= "GPH3",

			.to_irq = s5pc100_gpiolib_to_eint,

			.to_irq = samsung_gpiolib_to_irq,

		},

		},

	}, {

	}, {

		.base	= S5PC100_GPI_BASE,

		.base	= S5PC100_GPI_BASE,

arch/arm/mach-s5pv210/gpiolib.c

+8 −0
Original line number Original line Diff line number Diff line
@@ -224,34 +224,42 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = { 
	}, {

	}, {

		.base	= (S5P_VA_GPIO + 0xC00),

		.base	= (S5P_VA_GPIO + 0xC00),

		.config	= &gpio_cfg_noint,

		.config	= &gpio_cfg_noint,

		.irq_base = IRQ_EINT(0),

		.chip	= {

		.chip	= {

			.base	= S5PV210_GPH0(0),

			.base	= S5PV210_GPH0(0),

			.ngpio	= S5PV210_GPIO_H0_NR,

			.ngpio	= S5PV210_GPIO_H0_NR,

			.label	= "GPH0",

			.label	= "GPH0",

			.to_irq = samsung_gpiolib_to_irq,

		},

		},

	}, {

	}, {

		.base	= (S5P_VA_GPIO + 0xC20),

		.base	= (S5P_VA_GPIO + 0xC20),

		.config	= &gpio_cfg_noint,

		.config	= &gpio_cfg_noint,

		.irq_base = IRQ_EINT(8),

		.chip	= {

		.chip	= {

			.base	= S5PV210_GPH1(0),

			.base	= S5PV210_GPH1(0),

			.ngpio	= S5PV210_GPIO_H1_NR,

			.ngpio	= S5PV210_GPIO_H1_NR,

			.label	= "GPH1",

			.label	= "GPH1",

			.to_irq = samsung_gpiolib_to_irq,

		},

		},

	}, {

	}, {

		.base	= (S5P_VA_GPIO + 0xC40),

		.base	= (S5P_VA_GPIO + 0xC40),

		.config	= &gpio_cfg_noint,

		.config	= &gpio_cfg_noint,

		.irq_base = IRQ_EINT(16),

		.chip	= {

		.chip	= {

			.base	= S5PV210_GPH2(0),

			.base	= S5PV210_GPH2(0),

			.ngpio	= S5PV210_GPIO_H2_NR,

			.ngpio	= S5PV210_GPIO_H2_NR,

			.label	= "GPH2",

			.label	= "GPH2",

			.to_irq = samsung_gpiolib_to_irq,

		},

		},

	}, {

	}, {

		.base	= (S5P_VA_GPIO + 0xC60),

		.base	= (S5P_VA_GPIO + 0xC60),

		.config	= &gpio_cfg_noint,

		.config	= &gpio_cfg_noint,

		.irq_base = IRQ_EINT(24),

		.chip	= {

		.chip	= {

			.base	= S5PV210_GPH3(0),

			.base	= S5PV210_GPH3(0),

			.ngpio	= S5PV210_GPIO_H3_NR,

			.ngpio	= S5PV210_GPIO_H3_NR,

			.label	= "GPH3",

			.label	= "GPH3",

			.to_irq = samsung_gpiolib_to_irq,

		},

		},

	},

	},

};

};

arch/arm/plat-s3c24xx/gpiolib.c

+2 −6
Original line number Original line Diff line number Diff line
@@ -74,11 +74,6 @@ static int s3c24xx_gpiolib_bankf_toirq(struct gpio_chip *chip, unsigned offset) 
	return -EINVAL;

	return -EINVAL;

}

}





static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset)

{

	return IRQ_EINT8 + offset;

}



static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {

static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {

	.set_config	= s3c_gpio_setcfg_s3c24xx_a,

	.set_config	= s3c_gpio_setcfg_s3c24xx_a,

	.get_config	= s3c_gpio_getcfg_s3c24xx_a,

	.get_config	= s3c_gpio_getcfg_s3c24xx_a,
@@ -157,12 +152,13 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { 
	[6] = {

	[6] = {

		.base	= S3C2410_GPGCON,

		.base	= S3C2410_GPGCON,

		.pm	= __gpio_pm(&s3c_gpio_pm_2bit),

		.pm	= __gpio_pm(&s3c_gpio_pm_2bit),

		.irq_base = IRQ_EINT8,

		.chip	= {

		.chip	= {

			.base			= S3C2410_GPG(0),

			.base			= S3C2410_GPG(0),

			.owner			= THIS_MODULE,

			.owner			= THIS_MODULE,

			.label			= "GPIOG",

			.label			= "GPIOG",

			.ngpio			= 16,

			.ngpio			= 16,

			.to_irq			= s3c24xx_gpiolib_bankg_toirq,

			.to_irq			= samsung_gpiolib_to_irq,

		},

		},

	}, {

	}, {

		.base	= S3C2410_GPHCON,

		.base	= S3C2410_GPHCON,

arch/arm/plat-s5p/irq-gpioint.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -234,6 +234,7 @@ int __init s5p_register_gpio_interrupt(int pin) 
	/* register gpio group */

	/* register gpio group */

	ret = s5p_gpioint_add(my_chip);

	ret = s5p_gpioint_add(my_chip);

	if (ret == 0) {

	if (ret == 0) {

		my_chip->chip.to_irq = samsung_gpiolib_to_irq;

		printk(KERN_INFO "Registered interrupt support for gpio group %d.\n",

		printk(KERN_INFO "Registered interrupt support for gpio group %d.\n",

		       group);

		       group);

		return my_chip->irq_base + offset;

		return my_chip->irq_base + offset;