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Commit 8cb33cdd authored by Shashank Babu Chinta Venkata's avatar Shashank Babu Chinta Venkata
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defconfig: sdm845: enable compilation of MDSS PLL driver for 10nm



Add necessary configuration to enable compilation of MDSS
10nm PLL driver which is now based on common clock framework.

Change-Id: I8b84a178b9d87ea7fbe933bace878550bc7cc2e5
Signed-off-by: default avatarShashank Babu Chinta Venkata <sbchin@codeaurora.org>
parent 704b93b3
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+1 −0
Original line number Diff line number Diff line
@@ -408,6 +408,7 @@ CONFIG_CLOCK_QPNP_DIV=y
CONFIG_MSM_CLK_RPMH=y
CONFIG_CLOCK_CPU_OSM=y
CONFIG_MSM_GPUCC_SDM845=y
CONFIG_QCOM_MDSS_PLL=y
CONFIG_REMOTE_SPINLOCK_MSM=y
CONFIG_MSM_QMP=y
CONFIG_IOMMU_IO_PGTABLE_FAST=y
+1 −0
Original line number Diff line number Diff line
@@ -425,6 +425,7 @@ CONFIG_CLOCK_QPNP_DIV=y
CONFIG_MSM_CLK_RPMH=y
CONFIG_CLOCK_CPU_OSM=y
CONFIG_MSM_GPUCC_SDM845=y
CONFIG_QCOM_MDSS_PLL=y
CONFIG_REMOTE_SPINLOCK_MSM=y
CONFIG_MSM_QMP=y
CONFIG_IOMMU_IO_PGTABLE_FAST=y