Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8bded189 authored by Francisco Jerez's avatar Francisco Jerez Committed by Ben Skeggs
Browse files

drm/nv30: Init the PFB+0x3xx memory timing regs. 



Fixes the randomly flashing vertical lines seen on some nv3x after a
cold-boot.

Signed-off-by: default avatarFrancisco Jerez <currojerez@riseup.net>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent b01f0608

drivers/gpu/drm/nouveau/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -12,7 +12,7 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \ 
             nouveau_dp.o \

             nv04_timer.o \

             nv04_mc.o nv40_mc.o nv50_mc.o \

             nv04_fb.o nv10_fb.o nv40_fb.o nv50_fb.o \

             nv04_fb.o nv10_fb.o nv30_fb.o nv40_fb.o nv50_fb.o \

             nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o \

             nv04_graph.o nv10_graph.o nv20_graph.o \

             nv40_graph.o nv50_graph.o \

drivers/gpu/drm/nouveau/nouveau_drv.h

+4 −0
Original line number Diff line number Diff line
@@ -896,6 +896,10 @@ extern void nv10_fb_takedown(struct drm_device *); 
extern void nv10_fb_set_region_tiling(struct drm_device *, int, uint32_t,

				      uint32_t, uint32_t);



/* nv30_fb.c */

extern int  nv30_fb_init(struct drm_device *);

extern void nv30_fb_takedown(struct drm_device *);



/* nv40_fb.c */

extern int  nv40_fb_init(struct drm_device *);

extern void nv40_fb_takedown(struct drm_device *);

drivers/gpu/drm/nouveau/nouveau_state.c

+2 −2
Original line number Diff line number Diff line
@@ -184,8 +184,8 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev) 
		engine->timer.init		= nv04_timer_init;

		engine->timer.read		= nv04_timer_read;

		engine->timer.takedown		= nv04_timer_takedown;

		engine->fb.init			= nv10_fb_init;

		engine->fb.takedown		= nv10_fb_takedown;

		engine->fb.init			= nv30_fb_init;

		engine->fb.takedown		= nv30_fb_takedown;

		engine->fb.set_region_tiling	= nv10_fb_set_region_tiling;

		engine->graph.grclass		= nv30_graph_grclass;

		engine->graph.init		= nv30_graph_init;

drivers/gpu/drm/nouveau/nv30_fb.c

0 → 100644
+87 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2010 Francisco Jerez.

 * All Rights Reserved.

 *

 * Permission is hereby granted, free of charge, to any person obtaining

 * a copy of this software and associated documentation files (the

 * "Software"), to deal in the Software without restriction, including

 * without limitation the rights to use, copy, modify, merge, publish,

 * distribute, sublicense, and/or sell copies of the Software, and to

 * permit persons to whom the Software is furnished to do so, subject to

 * the following conditions:

 *

 * The above copyright notice and this permission notice (including the

 * next paragraph) shall be included in all copies or substantial

 * portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF

 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.

 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE

 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION

 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION

 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

 *

 */



#include "drmP.h"

#include "drm.h"

#include "nouveau_drv.h"

#include "nouveau_drm.h"



static int

calc_ref(int b, int l, int i)

{

	int j, x = 0;



	for (j = 0; j < 4; j++) {

		int n = (b >> (8 * j) & 0xf);

		int m = (l >> (8 * i) & 0xff) + 2 * (n & 0x8 ? n - 0x10 : n);



		x |= (0x80 | (m & 0x1f)) << (8 * j);

	}



	return x;

}



int

nv30_fb_init(struct drm_device *dev)

{

	struct drm_nouveau_private *dev_priv = dev->dev_private;

	struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;

	int i, j;



	pfb->num_tiles = NV10_PFB_TILE__SIZE;



	/* Turn all the tiling regions off. */

	for (i = 0; i < pfb->num_tiles; i++)

		pfb->set_region_tiling(dev, i, 0, 0, 0);



	/* Init the memory timing regs at 0x10037c/0x1003ac */

	if (dev_priv->chipset == 0x30 ||

	    dev_priv->chipset == 0x31 ||

	    dev_priv->chipset == 0x35) {

		/* Related to ROP count */

		int n = (dev_priv->chipset == 0x31 ? 2 : 4);

		int b = (dev_priv->chipset > 0x30 ?

			 nv_rd32(dev, 0x122c) & 0xf : 0);

		int l = nv_rd32(dev, 0x1003d0);



		for (i = 0; i < n; i++) {

			for (j = 0; j < 3; j++)

				nv_wr32(dev, 0x10037c + 0xc * i + 0x4 * j,

					calc_ref(b, l, j));



			for (j = 0; j < 2; j++)

				nv_wr32(dev, 0x1003ac + 0x8 * i + 0x4 * j,

					calc_ref(b, l, j));

		}

	}



	return 0;

}



void

nv30_fb_takedown(struct drm_device *dev)

{

}