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Commit 8bb06444 authored by David Brown's avatar David Brown
Browse files

msm: Generalize QGIC registers 



The QGIC registers are mapped to the same virtual addresses across
targets, only the physical address changes.  Move the BASE address out
of target-specific files, and add a SOC name to the base addresses.

Signed-off-by: default avatarDavid Brown <davidb@codeaurora.org>
parent 8c27e6f3

arch/arm/mach-msm/include/mach/msm_iomap-8x60.h

+4 −6
Original line number Diff line number Diff line
@@ -35,13 +35,11 @@ 
 *

 */



#define MSM_QGIC_DIST_BASE	IOMEM(0xF0000000)

#define MSM_QGIC_DIST_PHYS	0x02080000

#define MSM_QGIC_DIST_SIZE	SZ_4K

#define MSM8X60_QGIC_DIST_PHYS	0x02080000

#define MSM8X60_QGIC_DIST_SIZE	SZ_4K



#define MSM_QGIC_CPU_BASE	IOMEM(0xF0001000)

#define MSM_QGIC_CPU_PHYS	0x02081000

#define MSM_QGIC_CPU_SIZE	SZ_4K

#define MSM8X60_QGIC_CPU_PHYS	0x02081000

#define MSM8X60_QGIC_CPU_SIZE	SZ_4K



#define MSM_ACC_BASE		IOMEM(0xF0002000)

#define MSM_ACC_PHYS		0x02001000

arch/arm/mach-msm/include/mach/msm_iomap.h

+2 −0
Original line number Diff line number Diff line
@@ -55,6 +55,8 @@ 


/* Virtual addressses shared across all MSM targets. */

#define MSM_CSR_BASE		IOMEM(0xE0001000)

#define MSM_QGIC_DIST_BASE	IOMEM(0xF0000000)

#define MSM_QGIC_CPU_BASE	IOMEM(0xF0001000)

#define MSM_TMR_BASE		IOMEM(0xF0200000)

#define MSM_TMR0_BASE		IOMEM(0xF0201000)

arch/arm/mach-msm/io.c

+2 −2
Original line number Diff line number Diff line
@@ -103,8 +103,8 @@ void __init msm_map_qsd8x50_io(void) 


#ifdef CONFIG_ARCH_MSM8X60

static struct map_desc msm8x60_io_desc[] __initdata = {

	MSM_DEVICE(QGIC_DIST),

	MSM_DEVICE(QGIC_CPU),

	MSM_CHIP_DEVICE(QGIC_DIST, MSM8X60),

	MSM_CHIP_DEVICE(QGIC_CPU, MSM8X60),

	MSM_CHIP_DEVICE(TMR, MSM8X60),

	MSM_CHIP_DEVICE(TMR0, MSM8X60),

	MSM_DEVICE(ACC),