cw1200: Fix an assorted pile of checkpatch warnings. (8b3e7be4) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/net/wireless/cw1200/bh.c

+6 −3

Original line number	Original line	Diff line number	Diff line
	@@ -31,7 +31,8 @@ static int cw1200_bh(void *arg);

	#define DOWNLOAD_BLOCK_SIZE_WR (0x1000 - 4)		#define DOWNLOAD_BLOCK_SIZE_WR (0x1000 - 4)
	/* an SPI message cannot be bigger than (2"12-1)*2 bytes		/* an SPI message cannot be bigger than (2"12-1)*2 bytes
	* "2" to cvt to bytes /		* "*2" to cvt to bytes
			*/
	#define MAX_SZ_RD_WR_BUFFERS (DOWNLOAD_BLOCK_SIZE_WR*2)		#define MAX_SZ_RD_WR_BUFFERS (DOWNLOAD_BLOCK_SIZE_WR*2)
	#define PIGGYBACK_CTRL_REG (2)		#define PIGGYBACK_CTRL_REG (2)
	#define EFFECTIVE_BUF_SIZE (MAX_SZ_RD_WR_BUFFERS - PIGGYBACK_CTRL_REG)		#define EFFECTIVE_BUF_SIZE (MAX_SZ_RD_WR_BUFFERS - PIGGYBACK_CTRL_REG)
	@@ -217,7 +218,8 @@ static int cw1200_device_wakeup(struct cw1200_common *priv)
	return ret;		return ret;

	/* If the device returns WLAN_RDY as 1, the device is active and will		/* If the device returns WLAN_RDY as 1, the device is active and will
	* remain active. */		* remain active.
			*/
	if (ctrl_reg & ST90TDS_CONT_RDY_BIT) {		if (ctrl_reg & ST90TDS_CONT_RDY_BIT) {
	pr_debug("[BH] Device awake.\n");		pr_debug("[BH] Device awake.\n");
	return 1;		return 1;
	@@ -262,7 +264,8 @@ static int cw1200_bh_rx_helper(struct cw1200_common *priv,
	}		}

	/* Add SIZE of PIGGYBACK reg (CONTROL Reg)		/* Add SIZE of PIGGYBACK reg (CONTROL Reg)
	* to the NEXT Message length + 2 Bytes for SKB */		* to the NEXT Message length + 2 Bytes for SKB
			*/
	read_len = read_len + 2;		read_len = read_len + 2;

	alloc_len = priv->hwbus_ops->align_size(		alloc_len = priv->hwbus_ops->align_size(

+2 −1

Original line number	Original line	Diff line number	Diff line
	@@ -207,7 +207,8 @@ struct cw1200_common {
	/* Scan status */		/* Scan status */
	struct cw1200_scan scan;		struct cw1200_scan scan;
	/* Keep cw1200 awake (WUP = 1) 1 second after each scan to avoid		/* Keep cw1200 awake (WUP = 1) 1 second after each scan to avoid
	* FW issue with sleeping/waking up. */		* FW issue with sleeping/waking up.
			*/
	atomic_t recent_scan;		atomic_t recent_scan;
	struct delayed_work clear_recent_scan_work;		struct delayed_work clear_recent_scan_work;

+2 −1

Original line number	Original line	Diff line number	Diff line
	@@ -323,7 +323,8 @@ static int cw1200_sdio_probe(struct sdio_func *func,
	}		}

	/* Disconnect Function to be called by SDIO stack when		/* Disconnect Function to be called by SDIO stack when
	* device is disconnected */		* device is disconnected
			*/
	static void cw1200_sdio_disconnect(struct sdio_func *func)		static void cw1200_sdio_disconnect(struct sdio_func *func)
	{		{
	struct hwbus_priv *self = sdio_get_drvdata(func);		struct hwbus_priv *self = sdio_get_drvdata(func);

+1 −3

Original line number	Original line	Diff line number	Diff line
	@@ -47,15 +47,13 @@ struct hwbus_priv {
	#define SET_WRITE 0x7FFF /* usage: and operation */		#define SET_WRITE 0x7FFF /* usage: and operation */
	#define SET_READ 0x8000 /* usage: or operation */		#define SET_READ 0x8000 /* usage: or operation */

	/*		/* Notes on byte ordering:
	Notes on byte ordering:
	LE: B0 B1 B2 B3		LE: B0 B1 B2 B3
	BE: B3 B2 B1 B0		BE: B3 B2 B1 B0

	Hardware expects 32-bit data to be written as 16-bit BE words:		Hardware expects 32-bit data to be written as 16-bit BE words:

	B1 B0 B3 B2		B1 B0 B3 B2

	*/		*/

	static int cw1200_spi_memcpy_fromio(struct hwbus_priv *self,		static int cw1200_spi_memcpy_fromio(struct hwbus_priv *self,

+2 −3

Original line number	Original line	Diff line number	Diff line
	@@ -97,9 +97,8 @@ struct download_cntl_t {

	#define CW1200_APB(addr) (PAC_SHARED_MEMORY_SILICON + (addr))		#define CW1200_APB(addr) (PAC_SHARED_MEMORY_SILICON + (addr))

	/* ***************************************************************		/* Device register definitions */
	*Device register definitions
	*************************************************************** */
	/* WBF - SPI Register Addresses */		/* WBF - SPI Register Addresses */
	#define ST90TDS_ADDR_ID_BASE (0x0000)		#define ST90TDS_ADDR_ID_BASE (0x0000)
	/* 16/32 bits */		/* 16/32 bits */