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Commit 8b395265 authored by Paul Mundt's avatar Paul Mundt
Browse files

sh: Fix fatal oops in copy_user_page() on sh4a (SH7780). 



We had a pretty interesting oops happening, where copy_user_page()
was down()'ing p3map_sem[] with a bogus offset (particularly, an
offset that hadn't been initialized with sema_init(), due to the
mismatch between cpu_data->dcache.n_aliases and what was assumed
based off of the old CACHE_ALIAS value).

Luckily, spinlock debugging caught this for us, and so we drop
the old hardcoded CACHE_ALIAS for sh4 completely and rely on the
run-time probed cpu_data->dcache.alias_mask. This in turn gets
the p3map_sem[] index right, and everything works again.

While we're at it, also convert to 4-level page tables..

Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 75c92acd

arch/sh/mm/pg-sh4.c

+14 −10
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ 
 * arch/sh/mm/pg-sh4.c

 *

 * Copyright (C) 1999, 2000, 2002  Niibe Yutaka

 * Copyright (C) 2002  Paul Mundt

 * Copyright (C) 2002 - 2005  Paul Mundt

 *

 * Released under the terms of the GNU GPL v2.0.

 */
@@ -23,6 +23,8 @@ 


extern struct semaphore p3map_sem[];



#define CACHE_ALIAS (cpu_data->dcache.alias_mask)



/*

 * clear_user_page

 * @to: P1 address
@@ -41,8 +43,9 @@ void clear_user_page(void *to, unsigned long address, struct page *page) 
					   _PAGE_HW_SHARED | _PAGE_FLAGS_HARD);

		unsigned long phys_addr = PHYSADDR(to);

		unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS);

		pgd_t *dir = pgd_offset_k(p3_addr);

		pmd_t *pmd = pmd_offset(dir, p3_addr);

		pgd_t *pgd = pgd_offset_k(p3_addr);

		pud_t *pud = pud_offset(pgd, p3_addr);

		pmd_t *pmd = pmd_offset(pud, p3_addr);

		pte_t *pte = pte_offset_kernel(pmd, p3_addr);

		pte_t entry;

		unsigned long flags;
@@ -80,8 +83,9 @@ void copy_user_page(void *to, void *from, unsigned long address, 
					   _PAGE_HW_SHARED | _PAGE_FLAGS_HARD);

		unsigned long phys_addr = PHYSADDR(to);

		unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS);

		pgd_t *dir = pgd_offset_k(p3_addr);

		pmd_t *pmd = pmd_offset(dir, p3_addr);

		pgd_t *pgd = pgd_offset_k(p3_addr);

		pud_t *pud = pud_offset(pgd, p3_addr);

		pmd_t *pmd = pmd_offset(pud, p3_addr);

		pte_t *pte = pte_offset_kernel(pmd, p3_addr);

		pte_t entry;

		unsigned long flags;

include/asm-sh/cpu-sh4/cacheflush.h

+0 −4
Original line number Diff line number Diff line
@@ -16,10 +16,6 @@ 
 *  caching; in which case they're only semi-broken),

 *  so we need them.

 */



/* Page is 4K, OC size is 16K, there are four lines. */

#define CACHE_ALIAS 0x00003000



struct page;

struct mm_struct;

struct vm_area_struct;