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Commit 8a94b0aa authored by jilai wang's avatar jilai wang Committed by Rob Clark
Browse files

drm/msm/mdp5: Add support for msm8x74v1 



msm8x74v1 has different MDP5 version (v1.0) from msm8x74v2 (v1.2).
Add a separate config data to support msm8x74v1.

Signed-off-by: default avatarJilai Wang <jilaiw@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent 8155ad4c

drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c

+73 −4
Original line number Diff line number Diff line
@@ -22,7 +22,76 @@ struct mdp5_cfg_handler { 
/* mdp5_cfg must be exposed (used in mdp5.xml.h) */

const struct mdp5_cfg_hw *mdp5_cfg = NULL;



const struct mdp5_cfg_hw msm8x74_config = {

const struct mdp5_cfg_hw msm8x74v1_config = {

	.name = "msm8x74v1",

	.mdp = {

		.count = 1,

		.base = { 0x00100 },

	},

	.smp = {

		.mmb_count = 22,

		.mmb_size = 4096,

		.clients = {

			[SSPP_VIG0] =  1, [SSPP_VIG1] =  4, [SSPP_VIG2] =  7,

			[SSPP_DMA0] = 10, [SSPP_DMA1] = 13,

			[SSPP_RGB0] = 16, [SSPP_RGB1] = 17, [SSPP_RGB2] = 18,

		},

	},

	.ctl = {

		.count = 5,

		.base = { 0x00600, 0x00700, 0x00800, 0x00900, 0x00a00 },

		.flush_hw_mask = 0x0003ffff,

	},

	.pipe_vig = {

		.count = 3,

		.base = { 0x01200, 0x01600, 0x01a00 },

		.caps = MDP_PIPE_CAP_HFLIP |

			MDP_PIPE_CAP_VFLIP |

			MDP_PIPE_CAP_SCALE |

			MDP_PIPE_CAP_CSC   |

			0,

	},

	.pipe_rgb = {

		.count = 3,

		.base = { 0x01e00, 0x02200, 0x02600 },

		.caps = MDP_PIPE_CAP_HFLIP |

			MDP_PIPE_CAP_VFLIP |

			MDP_PIPE_CAP_SCALE |

			0,

	},

	.pipe_dma = {

		.count = 2,

		.base = { 0x02a00, 0x02e00 },

		.caps = MDP_PIPE_CAP_HFLIP |

			MDP_PIPE_CAP_VFLIP |

			0,

	},

	.lm = {

		.count = 5,

		.base = { 0x03200, 0x03600, 0x03a00, 0x03e00, 0x04200 },

		.nb_stages = 5,

	},

	.dspp = {

		.count = 3,

		.base = { 0x04600, 0x04a00, 0x04e00 },

	},

	.pp = {

		.count = 3,

		.base = { 0x21b00, 0x21c00, 0x21d00 },

	},

	.intf = {

		.base = { 0x21100, 0x21300, 0x21500, 0x21700 },

		.connect = {

			[0] = INTF_eDP,

			[1] = INTF_DSI,

			[2] = INTF_DSI,

			[3] = INTF_HDMI,

		},

	},

	.max_clk = 200000000,

};



const struct mdp5_cfg_hw msm8x74v2_config = {

	.name = "msm8x74",

	.mdp = {

		.count = 1,
@@ -73,7 +142,7 @@ const struct mdp5_cfg_hw msm8x74_config = { 
	},

	.ad = {

		.count = 2,

		.base = { 0x13100, 0x13300 }, /* NOTE: no ad in v1.0 */

		.base = { 0x13100, 0x13300 },

	},

	.pp = {

		.count = 3,
@@ -305,8 +374,8 @@ const struct mdp5_cfg_hw msm8x94_config = { 
};



static const struct mdp5_cfg_handler cfg_handlers[] = {

	{ .revision = 0, .config = { .hw = &msm8x74_config } },

	{ .revision = 2, .config = { .hw = &msm8x74_config } },

	{ .revision = 0, .config = { .hw = &msm8x74v1_config } },

	{ .revision = 2, .config = { .hw = &msm8x74v2_config } },

	{ .revision = 3, .config = { .hw = &apq8084_config } },

	{ .revision = 6, .config = { .hw = &msm8x16_config } },

	{ .revision = 9, .config = { .hw = &msm8x94_config } },