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Commit 8a6b3710 authored by Gavin Shan's avatar Gavin Shan Committed by Michael Ellerman
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powerpc/eeh: Rename flag EEH_PE_RESET to EEH_PE_CFG_BLOCKED 



The flag EEH_PE_RESET indicates blocking config space of the PE
during reset time. We potentially need block PE's config space
other than reset time. So it's reasonable to replace it with
EEH_PE_CFG_BLOCKED to indicate its usage.

There are no substantial code or logic changes in this patch.

Signed-off-by: default avatarGavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 8315070c

arch/powerpc/include/asm/eeh.h

+1 −1
Original line number Diff line number Diff line
@@ -71,7 +71,7 @@ struct device_node; 


#define EEH_PE_ISOLATED		(1 << 0)	/* Isolated PE		*/

#define EEH_PE_RECOVERING	(1 << 1)	/* Recovering PE	*/

#define EEH_PE_RESET		(1 << 2)	/* PE reset in progress	*/

#define EEH_PE_CFG_BLOCKED	(1 << 2)	/* Block config access	*/



#define EEH_PE_KEEP		(1 << 8)	/* Keep PE on hotplug	*/

arch/powerpc/kernel/eeh.c

+6 −6
Original line number Diff line number Diff line
@@ -673,18 +673,18 @@ int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state stat 
	switch (state) {

	case pcie_deassert_reset:

		eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);

		eeh_pe_state_clear(pe, EEH_PE_RESET);

		eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);

		break;

	case pcie_hot_reset:

		eeh_pe_state_mark(pe, EEH_PE_RESET);

		eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);

		eeh_ops->reset(pe, EEH_RESET_HOT);

		break;

	case pcie_warm_reset:

		eeh_pe_state_mark(pe, EEH_PE_RESET);

		eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);

		eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);

		break;

	default:

		eeh_pe_state_clear(pe, EEH_PE_RESET);

		eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);

		return -EINVAL;

	};
@@ -1523,7 +1523,7 @@ int eeh_pe_reset(struct eeh_pe *pe, int option) 
	switch (option) {

	case EEH_RESET_DEACTIVATE:

		ret = eeh_ops->reset(pe, option);

		eeh_pe_state_clear(pe, EEH_PE_RESET);

		eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);

		if (ret)

			break;
@@ -1538,7 +1538,7 @@ int eeh_pe_reset(struct eeh_pe *pe, int option) 
		 */

		eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);



		eeh_pe_state_mark(pe, EEH_PE_RESET);

		eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);

		ret = eeh_ops->reset(pe, option);

		break;

	default:

arch/powerpc/kernel/eeh_driver.c

+6 −6
Original line number Diff line number Diff line
@@ -528,13 +528,13 @@ int eeh_pe_reset_and_recover(struct eeh_pe *pe) 
	eeh_pe_dev_traverse(pe, eeh_report_error, &result);



	/* Issue reset */

	eeh_pe_state_mark(pe, EEH_PE_RESET);

	eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);

	ret = eeh_reset_pe(pe);

	if (ret) {

		eeh_pe_state_clear(pe, EEH_PE_RECOVERING | EEH_PE_RESET);

		eeh_pe_state_clear(pe, EEH_PE_RECOVERING | EEH_PE_CFG_BLOCKED);

		return ret;

	}

	eeh_pe_state_clear(pe, EEH_PE_RESET);

	eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);



	/* Unfreeze the PE */

	ret = eeh_clear_pe_frozen_state(pe, true);
@@ -601,10 +601,10 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus) 
	 * config accesses. So we prefer to block them. However, controlled

	 * PCI config accesses initiated from EEH itself are allowed.

	 */

	eeh_pe_state_mark(pe, EEH_PE_RESET);

	eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);

	rc = eeh_reset_pe(pe);

	if (rc) {

		eeh_pe_state_clear(pe, EEH_PE_RESET);

		eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);

		return rc;

	}
@@ -613,7 +613,7 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus) 
	/* Restore PE */

	eeh_ops->configure_bridge(pe);

	eeh_pe_restore_bars(pe);

	eeh_pe_state_clear(pe, EEH_PE_RESET);

	eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);



	/* Clear frozen state */

	rc = eeh_clear_pe_frozen_state(pe, false);

arch/powerpc/kernel/rtas_pci.c

+2 −2
Original line number Diff line number Diff line
@@ -111,7 +111,7 @@ static int rtas_pci_read_config(struct pci_bus *bus, 
		return PCIBIOS_DEVICE_NOT_FOUND;

#ifdef CONFIG_EEH

	edev = of_node_to_eeh_dev(dn);

	if (edev && edev->pe && edev->pe->state & EEH_PE_RESET)

	if (edev && edev->pe && edev->pe->state & EEH_PE_CFG_BLOCKED)

		return PCIBIOS_DEVICE_NOT_FOUND;

#endif
@@ -175,7 +175,7 @@ static int rtas_pci_write_config(struct pci_bus *bus, 
		return PCIBIOS_DEVICE_NOT_FOUND;

#ifdef CONFIG_EEH

	edev = of_node_to_eeh_dev(dn);

	if (edev && edev->pe && (edev->pe->state & EEH_PE_RESET))

	if (edev && edev->pe && (edev->pe->state & EEH_PE_CFG_BLOCKED))

		return PCIBIOS_DEVICE_NOT_FOUND;

#endif

	ret = rtas_write_config(pdn, where, size, val);

arch/powerpc/platforms/powernv/eeh-ioda.c

+1 −1
Original line number Diff line number Diff line
@@ -373,7 +373,7 @@ static int ioda_eeh_get_pe_state(struct eeh_pe *pe) 
	 * moving forward, we have to return operational

	 * state during PE reset.

	 */

	if (pe->state & EEH_PE_RESET) {

	if (pe->state & EEH_PE_CFG_BLOCKED) {

		result = (EEH_STATE_MMIO_ACTIVE  |

			  EEH_STATE_DMA_ACTIVE   |

			  EEH_STATE_MMIO_ENABLED |