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Commit 8922c9b4 authored by Ralf Baechle's avatar Ralf Baechle
Browse files

Merge branch 'broadcom' of git://dev.phrozen.org/mips-next into mips-for-linux-next

parents 73d155b3 22df90f6

arch/mips/bcm63xx/Makefile

+1 −1
Original line number Diff line number Diff line 
obj-y		+= clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \

		   dev-dsp.o dev-enet.o dev-flash.o dev-pcmcia.o dev-rng.o \

		   dev-spi.o dev-uart.o dev-wdt.o

		   dev-spi.o dev-uart.o dev-wdt.o dev-usb-usbd.o

obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o



obj-y		+= boards/

arch/mips/bcm63xx/boards/board_bcm963xx.c

+10 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
#include <bcm63xx_dev_flash.h>

#include <bcm63xx_dev_pcmcia.h>

#include <bcm63xx_dev_spi.h>

#include <bcm63xx_dev_usb_usbd.h>

#include <board_bcm963xx.h>



#define PFX	"board_bcm963xx: "
@@ -42,6 +43,12 @@ static struct board_info __initdata board_96328avng = { 


	.has_uart0			= 1,

	.has_pci			= 1,

	.has_usbd			= 0,



	.usbd = {

		.use_fullspeed		= 0,

		.port_no		= 0,

	},



	.leds = {

		{
@@ -888,6 +895,9 @@ int __init board_register_devices(void) 
	    !board_get_mac_address(board.enet1.mac_addr))

		bcm63xx_enet_register(1, &board.enet1);



	if (board.has_usbd)

		bcm63xx_usbd_register(&board.usbd);



	if (board.has_dsp)

		bcm63xx_dsp_register(&board.dsp);

arch/mips/bcm63xx/clk.c

+20 −1
Original line number Diff line number Diff line
@@ -160,7 +160,9 @@ static struct clk clk_pcm = { 
 */

static void usbh_set(struct clk *clk, int enable)

{

	if (BCMCPU_IS_6348())

	if (BCMCPU_IS_6328())

		bcm_hwclock_set(CKCTL_6328_USBH_EN, enable);

	else if (BCMCPU_IS_6348())

		bcm_hwclock_set(CKCTL_6348_USBH_EN, enable);

	else if (BCMCPU_IS_6368())

		bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
@@ -170,6 +172,21 @@ static struct clk clk_usbh = { 
	.set	= usbh_set,

};



/*

 * USB device clock

 */

static void usbd_set(struct clk *clk, int enable)

{

	if (BCMCPU_IS_6328())

		bcm_hwclock_set(CKCTL_6328_USBD_EN, enable);

	else if (BCMCPU_IS_6368())

		bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);

}



static struct clk clk_usbd = {

	.set	= usbd_set,

};



/*

 * SPI clock

 */
@@ -284,6 +301,8 @@ struct clk *clk_get(struct device *dev, const char *id) 
		return &clk_ephy;

	if (!strcmp(id, "usbh"))

		return &clk_usbh;

	if (!strcmp(id, "usbd"))

		return &clk_usbd;

	if (!strcmp(id, "spi"))

		return &clk_spi;

	if (!strcmp(id, "xtm"))

arch/mips/bcm63xx/dev-usb-usbd.c

0 → 100644
+65 −0
Original line number Diff line number Diff line 
/*

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 *

 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>

 * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>

 * Copyright (C) 2012 Broadcom Corporation

 */



#include <linux/init.h>

#include <linux/kernel.h>

#include <linux/platform_device.h>

#include <linux/dma-mapping.h>

#include <bcm63xx_cpu.h>

#include <bcm63xx_dev_usb_usbd.h>



#define NUM_MMIO		2

#define NUM_IRQ			7



static struct resource usbd_resources[NUM_MMIO + NUM_IRQ];



static u64 usbd_dmamask = DMA_BIT_MASK(32);



static struct platform_device bcm63xx_usbd_device = {

	.name		= "bcm63xx_udc",

	.id		= -1,

	.num_resources	= ARRAY_SIZE(usbd_resources),

	.resource	= usbd_resources,

	.dev		= {

		.dma_mask		= &usbd_dmamask,

		.coherent_dma_mask	= DMA_BIT_MASK(32),

	},

};



int __init bcm63xx_usbd_register(const struct bcm63xx_usbd_platform_data *pd)

{

	const int irq_list[NUM_IRQ] = { IRQ_USBD,

		IRQ_USBD_RXDMA0, IRQ_USBD_TXDMA0,

		IRQ_USBD_RXDMA1, IRQ_USBD_TXDMA1,

		IRQ_USBD_RXDMA2, IRQ_USBD_TXDMA2 };

	int i;



	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368())

		return 0;



	usbd_resources[0].start = bcm63xx_regset_address(RSET_USBD);

	usbd_resources[0].end = usbd_resources[0].start + RSET_USBD_SIZE - 1;

	usbd_resources[0].flags = IORESOURCE_MEM;



	usbd_resources[1].start = bcm63xx_regset_address(RSET_USBDMA);

	usbd_resources[1].end = usbd_resources[1].start + RSET_USBDMA_SIZE - 1;

	usbd_resources[1].flags = IORESOURCE_MEM;



	for (i = 0; i < NUM_IRQ; i++) {

		struct resource *r = &usbd_resources[NUM_MMIO + i];



		r->start = r->end = bcm63xx_get_irq_number(irq_list[i]);

		r->flags = IORESOURCE_IRQ;

	}



	platform_device_add_data(&bcm63xx_usbd_device, pd, sizeof(*pd));



	return platform_device_register(&bcm63xx_usbd_device);

}

arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h

+79 −6
Original line number Diff line number Diff line
@@ -120,6 +120,8 @@ enum bcm63xx_regs_set { 
	RSET_OHCI0,

	RSET_OHCI_PRIV,

	RSET_USBH_PRIV,

	RSET_USBD,

	RSET_USBDMA,

	RSET_MPI,

	RSET_PCMCIA,

	RSET_PCIE,
@@ -162,6 +164,8 @@ enum bcm63xx_regs_set { 
#define RSET_UDC_SIZE			256

#define RSET_OHCI_SIZE			256

#define RSET_EHCI_SIZE			256

#define RSET_USBD_SIZE			256

#define RSET_USBDMA_SIZE		1280

#define RSET_PCMCIA_SIZE		12

#define RSET_M2M_SIZE			256

#define RSET_ATM_SIZE			4096
@@ -183,10 +187,11 @@ enum bcm63xx_regs_set { 
#define BCM_6328_GPIO_BASE		(0xb0000080)

#define BCM_6328_SPI_BASE		(0xdeadbeef)

#define BCM_6328_UDC0_BASE		(0xdeadbeef)

#define BCM_6328_USBDMA_BASE		(0xdeadbeef)

#define BCM_6328_OHCI0_BASE		(0xdeadbeef)

#define BCM_6328_USBDMA_BASE		(0xb000c000)

#define BCM_6328_OHCI0_BASE		(0xb0002600)

#define BCM_6328_OHCI_PRIV_BASE		(0xdeadbeef)

#define BCM_6328_USBH_PRIV_BASE		(0xdeadbeef)

#define BCM_6328_USBH_PRIV_BASE		(0xb0002700)

#define BCM_6328_USBD_BASE		(0xb0002400)

#define BCM_6328_MPI_BASE		(0xdeadbeef)

#define BCM_6328_PCMCIA_BASE		(0xdeadbeef)

#define BCM_6328_PCIE_BASE		(0xb0e40000)
@@ -199,7 +204,7 @@ enum bcm63xx_regs_set { 
#define BCM_6328_ENETDMAC_BASE		(0xb000da00)

#define BCM_6328_ENETDMAS_BASE		(0xb000dc00)

#define BCM_6328_ENETSW_BASE		(0xb0e00000)

#define BCM_6328_EHCI0_BASE		(0x10002500)

#define BCM_6328_EHCI0_BASE		(0xb0002500)

#define BCM_6328_SDRAM_BASE		(0xdeadbeef)

#define BCM_6328_MEMC_BASE		(0xdeadbeef)

#define BCM_6328_DDR_BASE		(0xb0003000)
@@ -232,6 +237,7 @@ enum bcm63xx_regs_set { 
#define BCM_6338_OHCI0_BASE		(0xdeadbeef)

#define BCM_6338_OHCI_PRIV_BASE		(0xfffe3000)

#define BCM_6338_USBH_PRIV_BASE		(0xdeadbeef)

#define BCM_6338_USBD_BASE		(0xdeadbeef)

#define BCM_6338_MPI_BASE		(0xfffe3160)

#define BCM_6338_PCMCIA_BASE		(0xdeadbeef)

#define BCM_6338_PCIE_BASE		(0xdeadbeef)
@@ -286,6 +292,7 @@ enum bcm63xx_regs_set { 
#define BCM_6345_OHCI0_BASE		(0xfffe2100)

#define BCM_6345_OHCI_PRIV_BASE		(0xfffe2200)

#define BCM_6345_USBH_PRIV_BASE		(0xdeadbeef)

#define BCM_6345_USBD_BASE		(0xdeadbeef)

#define BCM_6345_SDRAM_REGS_BASE	(0xfffe2300)

#define BCM_6345_DSL_BASE		(0xdeadbeef)

#define BCM_6345_UBUS_BASE		(0xdeadbeef)
@@ -319,9 +326,11 @@ enum bcm63xx_regs_set { 
#define BCM_6348_GPIO_BASE		(0xfffe0400)

#define BCM_6348_SPI_BASE		(0xfffe0c00)

#define BCM_6348_UDC0_BASE		(0xfffe1000)

#define BCM_6348_USBDMA_BASE		(0xdeadbeef)

#define BCM_6348_OHCI0_BASE		(0xfffe1b00)

#define BCM_6348_OHCI_PRIV_BASE		(0xfffe1c00)

#define BCM_6348_USBH_PRIV_BASE		(0xdeadbeef)

#define BCM_6348_USBD_BASE		(0xdeadbeef)

#define BCM_6348_MPI_BASE		(0xfffe2000)

#define BCM_6348_PCMCIA_BASE		(0xfffe2054)

#define BCM_6348_PCIE_BASE		(0xdeadbeef)
@@ -362,9 +371,11 @@ enum bcm63xx_regs_set { 
#define BCM_6358_GPIO_BASE		(0xfffe0080)

#define BCM_6358_SPI_BASE		(0xfffe0800)

#define BCM_6358_UDC0_BASE		(0xfffe0800)

#define BCM_6358_USBDMA_BASE		(0xdeadbeef)

#define BCM_6358_OHCI0_BASE		(0xfffe1400)

#define BCM_6358_OHCI_PRIV_BASE		(0xdeadbeef)

#define BCM_6358_USBH_PRIV_BASE		(0xfffe1500)

#define BCM_6358_USBD_BASE		(0xdeadbeef)

#define BCM_6358_MPI_BASE		(0xfffe1000)

#define BCM_6358_PCMCIA_BASE		(0xfffe1054)

#define BCM_6358_PCIE_BASE		(0xdeadbeef)
@@ -406,9 +417,11 @@ enum bcm63xx_regs_set { 
#define BCM_6368_GPIO_BASE		(0xb0000080)

#define BCM_6368_SPI_BASE		(0xb0000800)

#define BCM_6368_UDC0_BASE		(0xdeadbeef)

#define BCM_6368_USBDMA_BASE		(0xb0004800)

#define BCM_6368_OHCI0_BASE		(0xb0001600)

#define BCM_6368_OHCI_PRIV_BASE		(0xdeadbeef)

#define BCM_6368_USBH_PRIV_BASE		(0xb0001700)

#define BCM_6368_USBD_BASE		(0xb0001400)

#define BCM_6368_MPI_BASE		(0xb0001000)

#define BCM_6368_PCMCIA_BASE		(0xb0001054)

#define BCM_6368_PCIE_BASE		(0xdeadbeef)
@@ -458,6 +471,8 @@ extern const unsigned long *bcm63xx_regs_base; 
	__GEN_RSET_BASE(__cpu, OHCI0)					\

	__GEN_RSET_BASE(__cpu, OHCI_PRIV)				\

	__GEN_RSET_BASE(__cpu, USBH_PRIV)				\

	__GEN_RSET_BASE(__cpu, USBD)					\

	__GEN_RSET_BASE(__cpu, USBDMA)					\

	__GEN_RSET_BASE(__cpu, MPI)					\

	__GEN_RSET_BASE(__cpu, PCMCIA)					\

	__GEN_RSET_BASE(__cpu, PCIE)					\
@@ -499,6 +514,8 @@ extern const unsigned long *bcm63xx_regs_base; 
	[RSET_OHCI0]		= BCM_## __cpu ##_OHCI0_BASE,		\

	[RSET_OHCI_PRIV]	= BCM_## __cpu ##_OHCI_PRIV_BASE,	\

	[RSET_USBH_PRIV]	= BCM_## __cpu ##_USBH_PRIV_BASE,	\

	[RSET_USBD]		= BCM_## __cpu ##_USBD_BASE,		\

	[RSET_USBDMA]		= BCM_## __cpu ##_USBDMA_BASE,		\

	[RSET_MPI]		= BCM_## __cpu ##_MPI_BASE,		\

	[RSET_PCMCIA]		= BCM_## __cpu ##_PCMCIA_BASE,		\

	[RSET_PCIE]		= BCM_## __cpu ##_PCIE_BASE,		\
@@ -569,6 +586,13 @@ enum bcm63xx_irq { 
	IRQ_ENET_PHY,

	IRQ_OHCI0,

	IRQ_EHCI0,

	IRQ_USBD,

	IRQ_USBD_RXDMA0,

	IRQ_USBD_TXDMA0,

	IRQ_USBD_RXDMA1,

	IRQ_USBD_TXDMA1,

	IRQ_USBD_RXDMA2,

	IRQ_USBD_TXDMA2,

	IRQ_ENET0_RXDMA,

	IRQ_ENET0_TXDMA,

	IRQ_ENET1_RXDMA,
@@ -602,8 +626,15 @@ enum bcm63xx_irq { 
#define BCM_6328_ENET0_IRQ		0

#define BCM_6328_ENET1_IRQ		0

#define BCM_6328_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 12)

#define BCM_6328_OHCI0_IRQ		(IRQ_INTERNAL_BASE + 9)

#define BCM_6328_EHCI0_IRQ		(IRQ_INTERNAL_BASE + 10)

#define BCM_6328_OHCI0_IRQ		(BCM_6328_HIGH_IRQ_BASE + 9)

#define BCM_6328_EHCI0_IRQ		(BCM_6328_HIGH_IRQ_BASE + 10)

#define BCM_6328_USBD_IRQ		(IRQ_INTERNAL_BASE + 4)

#define BCM_6328_USBD_RXDMA0_IRQ	(IRQ_INTERNAL_BASE + 5)

#define BCM_6328_USBD_TXDMA0_IRQ	(IRQ_INTERNAL_BASE + 6)

#define BCM_6328_USBD_RXDMA1_IRQ	(IRQ_INTERNAL_BASE + 7)

#define BCM_6328_USBD_TXDMA1_IRQ	(IRQ_INTERNAL_BASE + 8)

#define BCM_6328_USBD_RXDMA2_IRQ	(IRQ_INTERNAL_BASE + 9)

#define BCM_6328_USBD_TXDMA2_IRQ	(IRQ_INTERNAL_BASE + 10)

#define BCM_6328_PCMCIA_IRQ		0

#define BCM_6328_ENET0_RXDMA_IRQ	0

#define BCM_6328_ENET0_TXDMA_IRQ	0
@@ -642,6 +673,13 @@ enum bcm63xx_irq { 
#define BCM_6338_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 9)

#define BCM_6338_OHCI0_IRQ		0

#define BCM_6338_EHCI0_IRQ		0

#define BCM_6338_USBD_IRQ		0

#define BCM_6338_USBD_RXDMA0_IRQ	0

#define BCM_6338_USBD_TXDMA0_IRQ	0

#define BCM_6338_USBD_RXDMA1_IRQ	0

#define BCM_6338_USBD_TXDMA1_IRQ	0

#define BCM_6338_USBD_RXDMA2_IRQ	0

#define BCM_6338_USBD_TXDMA2_IRQ	0

#define BCM_6338_ENET0_RXDMA_IRQ	(IRQ_INTERNAL_BASE + 15)

#define BCM_6338_ENET0_TXDMA_IRQ	(IRQ_INTERNAL_BASE + 16)

#define BCM_6338_ENET1_RXDMA_IRQ	0
@@ -673,6 +711,13 @@ enum bcm63xx_irq { 
#define BCM_6345_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 12)

#define BCM_6345_OHCI0_IRQ		0

#define BCM_6345_EHCI0_IRQ		0

#define BCM_6345_USBD_IRQ		0

#define BCM_6345_USBD_RXDMA0_IRQ	0

#define BCM_6345_USBD_TXDMA0_IRQ	0

#define BCM_6345_USBD_RXDMA1_IRQ	0

#define BCM_6345_USBD_TXDMA1_IRQ	0

#define BCM_6345_USBD_RXDMA2_IRQ	0

#define BCM_6345_USBD_TXDMA2_IRQ	0

#define BCM_6345_ENET0_RXDMA_IRQ	(IRQ_INTERNAL_BASE + 13 + 1)

#define BCM_6345_ENET0_TXDMA_IRQ	(IRQ_INTERNAL_BASE + 13 + 2)

#define BCM_6345_ENET1_RXDMA_IRQ	0
@@ -704,6 +749,13 @@ enum bcm63xx_irq { 
#define BCM_6348_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 9)

#define BCM_6348_OHCI0_IRQ		(IRQ_INTERNAL_BASE + 12)

#define BCM_6348_EHCI0_IRQ		0

#define BCM_6348_USBD_IRQ		0

#define BCM_6348_USBD_RXDMA0_IRQ	0

#define BCM_6348_USBD_TXDMA0_IRQ	0

#define BCM_6348_USBD_RXDMA1_IRQ	0

#define BCM_6348_USBD_TXDMA1_IRQ	0

#define BCM_6348_USBD_RXDMA2_IRQ	0

#define BCM_6348_USBD_TXDMA2_IRQ	0

#define BCM_6348_ENET0_RXDMA_IRQ	(IRQ_INTERNAL_BASE + 20)

#define BCM_6348_ENET0_TXDMA_IRQ	(IRQ_INTERNAL_BASE + 21)

#define BCM_6348_ENET1_RXDMA_IRQ	(IRQ_INTERNAL_BASE + 22)
@@ -735,6 +787,13 @@ enum bcm63xx_irq { 
#define BCM_6358_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 9)

#define BCM_6358_OHCI0_IRQ		(IRQ_INTERNAL_BASE + 5)

#define BCM_6358_EHCI0_IRQ		(IRQ_INTERNAL_BASE + 10)

#define BCM_6358_USBD_IRQ		0

#define BCM_6358_USBD_RXDMA0_IRQ	0

#define BCM_6358_USBD_TXDMA0_IRQ	0

#define BCM_6358_USBD_RXDMA1_IRQ	0

#define BCM_6358_USBD_TXDMA1_IRQ	0

#define BCM_6358_USBD_RXDMA2_IRQ	0

#define BCM_6358_USBD_TXDMA2_IRQ	0

#define BCM_6358_ENET0_RXDMA_IRQ	(IRQ_INTERNAL_BASE + 15)

#define BCM_6358_ENET0_TXDMA_IRQ	(IRQ_INTERNAL_BASE + 16)

#define BCM_6358_ENET1_RXDMA_IRQ	(IRQ_INTERNAL_BASE + 17)
@@ -775,6 +834,13 @@ enum bcm63xx_irq { 
#define BCM_6368_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 15)

#define BCM_6368_OHCI0_IRQ		(IRQ_INTERNAL_BASE + 5)

#define BCM_6368_EHCI0_IRQ		(IRQ_INTERNAL_BASE + 7)

#define BCM_6368_USBD_IRQ		(IRQ_INTERNAL_BASE + 8)

#define BCM_6368_USBD_RXDMA0_IRQ	(IRQ_INTERNAL_BASE + 26)

#define BCM_6368_USBD_TXDMA0_IRQ	(IRQ_INTERNAL_BASE + 27)

#define BCM_6368_USBD_RXDMA1_IRQ	(IRQ_INTERNAL_BASE + 28)

#define BCM_6368_USBD_TXDMA1_IRQ	(IRQ_INTERNAL_BASE + 29)

#define BCM_6368_USBD_RXDMA2_IRQ	(IRQ_INTERNAL_BASE + 30)

#define BCM_6368_USBD_TXDMA2_IRQ	(IRQ_INTERNAL_BASE + 31)

#define BCM_6368_PCMCIA_IRQ		0

#define BCM_6368_ENET0_RXDMA_IRQ	0

#define BCM_6368_ENET0_TXDMA_IRQ	0
@@ -815,6 +881,13 @@ extern const int *bcm63xx_irqs; 
	[IRQ_ENET_PHY]		= BCM_## __cpu ##_ENET_PHY_IRQ,		\

	[IRQ_OHCI0]		= BCM_## __cpu ##_OHCI0_IRQ,		\

	[IRQ_EHCI0]		= BCM_## __cpu ##_EHCI0_IRQ,		\

	[IRQ_USBD]		= BCM_## __cpu ##_USBD_IRQ,		\

	[IRQ_USBD_RXDMA0]	= BCM_## __cpu ##_USBD_RXDMA0_IRQ,	\

	[IRQ_USBD_TXDMA0]	= BCM_## __cpu ##_USBD_TXDMA0_IRQ,	\

	[IRQ_USBD_RXDMA1]	= BCM_## __cpu ##_USBD_RXDMA1_IRQ,	\

	[IRQ_USBD_TXDMA1]	= BCM_## __cpu ##_USBD_TXDMA1_IRQ,	\

	[IRQ_USBD_RXDMA2]	= BCM_## __cpu ##_USBD_RXDMA2_IRQ,	\

	[IRQ_USBD_TXDMA2]	= BCM_## __cpu ##_USBD_TXDMA2_IRQ,	\

	[IRQ_ENET0_RXDMA]	= BCM_## __cpu ##_ENET0_RXDMA_IRQ,	\

	[IRQ_ENET0_TXDMA]	= BCM_## __cpu ##_ENET0_TXDMA_IRQ,	\

	[IRQ_ENET1_RXDMA]	= BCM_## __cpu ##_ENET1_RXDMA_IRQ,	\