Commit 8882edf7 authored Feb 27, 2015 by Andi Kleen Committed by Ingo Molnar Apr 02, 2015

perf/x86/intel: Reset more state in PMU reset



The PMU reset code didn't quite keep up with newer PMU features.
Improve it a bit to really reset a modern PMU:

  - Clear all overflow status
  - Clear LBRs and freezing state
  - Disable fixed counters too

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/1425059312-18217-2-git-send-email-andi@firstfloor.org


Signed-off-by: Ingo Molnar <mingo@kernel.org>

parent b37609c3

arch/x86/kernel/cpu/perf_event_intel.c

+12 −0

Original line number	Diff line number	Diff line
		@@ -1538,6 +1538,18 @@ static void intel_pmu_reset(void)
		if (ds)
		ds->bts_index = ds->bts_buffer_base;

		/* Ack all overflows and disable fixed counters */
		if (x86_pmu.version >= 2) {
		intel_pmu_ack_status(intel_pmu_get_status());
		wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0);
		}

		/* Reset LBRs and LBR freezing */
		if (x86_pmu.lbr_nr) {
		update_debugctlmsr(get_debugctlmsr() &
		~(DEBUGCTLMSR_FREEZE_LBRS_ON_PMI\|DEBUGCTLMSR_LBR));
		}

		local_irq_restore(flags);
		}