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Commit 87d77c4e authored Apr 12, 2010 by Bruno Randolf Committed by John W. Linville Apr 14, 2010

ath5k: treat RXORN as non-fatal



We get RXORN interrupts when all receive buffers are full. This is not
necessarily a fatal situation. It can also happen when the bus is busy or the
CPU is not fast enough to process all frames.

Older chipsets apparently need a reset to come out of this situration, but on
newer chips we can treat RXORN like RX, as going thru a full reset does more
harm than good, there.

The exact chip revisions which need a reset are unknown - this guess
AR5K_SREV_AR5212 ("venice") is copied from the HAL.

Inspired by openwrt 413-rxorn.patch:
"treat rxorn like rx, reset after rxorn seems to do more harm than good"

Signed-off-by: Bruno Randolf <br1@einfach.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

parent 0edc9a67

drivers/net/wireless/ath/ath5k/base.c

+14 −1

Original line number	Diff line number	Diff line
		@@ -2705,7 +2705,20 @@ ath5k_intr(int irq, void *dev_id)
		*/
		tasklet_schedule(&sc->restq);
		} else if (unlikely(status & AR5K_INT_RXORN)) {
		/*
		* Receive buffers are full. Either the bus is busy or
		* the CPU is not fast enough to process all received
		* frames.
		* Older chipsets need a reset to come out of this
		* condition, but we treat it as RX for newer chips.
		* We don't know exactly which versions need a reset -
		* this guess is copied from the HAL.
		*/
		sc->stats.rxorn_intr++;
		if (ah->ah_mac_srev < AR5K_SREV_AR5212)
		tasklet_schedule(&sc->restq);
		else
		tasklet_schedule(&sc->rxtq);
		} else {
		if (status & AR5K_INT_SWBA) {
		tasklet_hi_schedule(&sc->beacontq);

drivers/net/wireless/ath/ath5k/base.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -135,6 +135,7 @@ struct ath5k_statistics {
		unsigned int beacons;

		unsigned int mib_intr;
		unsigned int rxorn_intr;
		};

		#if CHAN_DEBUG