Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 86e43a7a authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'dt' of git://github.com/hzhuang1/linux into next/dt 

* 'dt' of git://github.com/hzhuang1/linux

:
  Documentation: update docs for mmp dt
  ARM: dts: refresh dts file for arch mmp
  ARM: mmp: support pxa910 with device tree
  ARM: mmp: support mmp2 with device tree
  gpio: pxa: parse gpio from DTS file
  ARM: mmp: support DT in timer
  ARM: mmp: support DT in irq
  ARM: mmp: append CONFIG_MACH_MMP2_DT
  ARM: mmp: fix build issue on mmp with device tree

Includes an update to v3-4-rc5

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 6ec4ed82 ace1297f

Documentation/ABI/testing/sysfs-bus-hsi

0 → 100644
+19 −0
Original line number Original line Diff line number Diff line 
What:		/sys/bus/hsi

Date:		April 2012

KernelVersion:	3.4

Contact:	Carlos Chinea <carlos.chinea@nokia.com>

Description:

		High Speed Synchronous Serial Interface (HSI) is a

		serial interface mainly used for connecting application

		engines (APE) with cellular modem engines (CMT) in cellular

		handsets.

		The bus will be populated with devices (hsi_clients) representing

		the protocols available in the system. Bus drivers implement

		those protocols.



What:		/sys/bus/hsi/devices/.../modalias

Date:		April 2012

KernelVersion:	3.4

Contact:	Carlos Chinea <carlos.chinea@nokia.com>

Description:	Stores the same MODALIAS value emitted by uevent

		Format: hsi:<hsi_client device name>

Documentation/devicetree/bindings/arm/mrvl/intc.txt

0 → 100644
+40 −0
Original line number Original line Diff line number Diff line 
* Marvell MMP Interrupt controller



Required properties:

- compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or

  "mrvl,mmp2-mux-intc"

- reg : Address and length of the register set of the interrupt controller.

  If the interrupt controller is intc, address and length means the range

  of the whold interrupt controller. If the interrupt controller is mux-intc,

  address and length means one register. Since address of mux-intc is in the

  range of intc. mux-intc is secondary interrupt controller.

- reg-names : Name of the register set of the interrupt controller. It's

  only required in mux-intc interrupt controller.

- interrupts : Should be the port interrupt shared by mux interrupts. It's

  only required in mux-intc interrupt controller.

- interrupt-controller : Identifies the node as an interrupt controller.

- #interrupt-cells : Specifies the number of cells needed to encode an

  interrupt source.

- mrvl,intc-nr-irqs : Specifies the number of interrupts in the interrupt

  controller.

- mrvl,clr-mfp-irq : Specifies the interrupt that needs to clear MFP edge

  detection first.



Example:

	intc: interrupt-controller@d4282000 {

		compatible = "mrvl,mmp2-intc";

		interrupt-controller;

		#interrupt-cells = <1>;

		reg = <0xd4282000 0x1000>;

		mrvl,intc-nr-irqs = <64>;

	};



	intcmux4@d4282150 {

		compatible = "mrvl,mmp2-mux-intc";

		interrupts = <4>;

		interrupt-controller;

		#interrupt-cells = <1>;

		reg = <0x150 0x4>, <0x168 0x4>;

		reg-names = "mux status", "mux mask";

		mrvl,intc-nr-irqs = <2>;

	};

Documentation/devicetree/bindings/arm/mrvl.txt→Documentation/devicetree/bindings/arm/mrvl/mrvl.txt

+8 −0
Original line number Original line Diff line number Diff line
@@ -4,3 +4,11 @@ Marvell Platforms Device Tree Bindings 
PXA168 Aspenite Board

PXA168 Aspenite Board

Required root node properties:

Required root node properties:

	- compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168";

	- compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168";



PXA910 DKB Board

Required root node properties:

	- compatible = "mrvl,pxa910-dkb";



MMP2 Brownstone Board

Required root node properties:

	- compatible = "mrvl,mmp2-brownstone";

Documentation/devicetree/bindings/arm/mrvl/timer.txt

0 → 100644
+13 −0
Original line number Original line Diff line number Diff line 
* Marvell MMP Timer controller



Required properties:

- compatible : Should be "mrvl,mmp-timer".

- reg : Address and length of the register set of timer controller.

- interrupts : Should be the interrupt number.



Example:

	timer0: timer@d4014000 {

		compatible = "mrvl,mmp-timer";

		reg = <0xd4014000 0x100>;

		interrupts = <13>;

	};

Documentation/devicetree/bindings/gpio/mrvl-gpio.txt

+12 −6
Original line number Original line Diff line number Diff line
@@ -3,19 +3,25 @@ 
Required properties:

Required properties:

- compatible : Should be "mrvl,pxa-gpio" or "mrvl,mmp-gpio"

- compatible : Should be "mrvl,pxa-gpio" or "mrvl,mmp-gpio"

- reg : Address and length of the register set for the device

- reg : Address and length of the register set for the device

- interrupts : Should be the port interrupt shared by all gpio pins, if

- interrupts : Should be the port interrupt shared by all gpio pins.

- interrupt-name : Should be the name of irq resource.

  There're three gpio interrupts in arch-pxa, and they're gpio0,

  one number.

  gpio1 and gpio_mux. There're only one gpio interrupt in arch-mmp,

  gpio_mux.

- interrupt-name : Should be the name of irq resource. Each interrupt

  binds its interrupt-name.

- interrupt-controller : Identifies the node as an interrupt controller.

- #interrupt-cells: Specifies the number of cells needed to encode an

  interrupt source.

- gpio-controller : Marks the device node as a gpio controller.

- gpio-controller : Marks the device node as a gpio controller.

- #gpio-cells : Should be one.  It is the pin number.

- #gpio-cells : Should be one.  It is the pin number.





Example:

Example:





	gpio: gpio@d4019000 {

	gpio: gpio@d4019000 {

		compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio";

		compatible = "mrvl,mmp-gpio";

		reg = <0xd4019000 0x1000>;

		reg = <0xd4019000 0x1000>;

		interrupts = <49>, <17>, <18>;

		interrupts = <49>;

		interrupt-name = "gpio_mux", "gpio0", "gpio1";

		interrupt-name = "gpio_mux";

		gpio-controller;

		gpio-controller;

		#gpio-cells = <1>;

		#gpio-cells = <1>;

		interrupt-controller;

		interrupt-controller;