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Commit 8635233c authored by Andrew Bresticker's avatar Andrew Bresticker Committed by Ralf Baechle
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MIPS: Move MIPS_GIC_IRQ_BASE into platform irq.h



Define a generic MIPS_GIC_IRQ_BASE which should be suitable for all
current boards in <mach-generic/irq.h>.

Signed-off-by: default avatarAndrew Bresticker <abrestic@chromium.org>
Reviewed-by: default avatarQais Yousef <qais.yousef@imgtec.com>
Tested-by: default avatarQais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7808/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent aa827b74
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+6 −0
Original line number Diff line number Diff line
@@ -36,4 +36,10 @@

#endif /* CONFIG_IRQ_CPU */

#ifdef CONFIG_MIPS_GIC
#ifndef MIPS_GIC_IRQ_BASE
#define MIPS_GIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8)
#endif
#endif /* CONFIG_MIPS_GIC */

#endif /* __ASM_MACH_GENERIC_IRQ_H */
+0 −2
Original line number Diff line number Diff line
@@ -10,8 +10,6 @@
#ifndef _MIPS_MALTAINT_H
#define _MIPS_MALTAINT_H

#define MIPS_GIC_IRQ_BASE	(MIPS_CPU_IRQ_BASE + 8)

/*
 * Interrupts 0..15 are used for Malta ISA compatible interrupts
 */
+0 −2
Original line number Diff line number Diff line
@@ -14,6 +14,4 @@
#define GIC_BASE_ADDR		0x1b1c0000
#define GIC_ADDRSPACE_SZ	(128 * 1024)

#define MIPS_GIC_IRQ_BASE	(MIPS_CPU_IRQ_BASE + 8)

#endif /* !(_MIPS_SEAD3INT_H) */