Commit 85f7cdac authored Sep 18, 2014 by Andrew Bresticker Committed by Ralf Baechle Nov 24, 2014

MIPS: Provide a generic plat_irq_dispatch



For platforms which boot with device-tree or have correctly chained
all external interrupt controllers, a generic plat_irq_dispatch() can
be used.  Implement a plat_irq_dispatch() which simply handles all the
pending interrupts as reported by C0_Cause.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7801/


Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent afe8dc25

arch/mips/kernel/irq_cpu.c

+18 −0

Original line number	Diff line number	Diff line
		@@ -94,6 +94,24 @@ static struct irq_chip mips_mt_cpu_irq_controller = {
		.irq_eoi = unmask_mips_irq,
		};

		asmlinkage void __weak plat_irq_dispatch(void)
		{
		unsigned long pending = read_c0_cause() & read_c0_status() & ST0_IM;
		int irq;

		if (!pending) {
		spurious_interrupt();
		return;
		}

		pending >>= CAUSEB_IP;
		while (pending) {
		irq = fls(pending) - 1;
		do_IRQ(MIPS_CPU_IRQ_BASE + irq);
		pending &= ~BIT(irq);
		}
		}

		static int mips_cpu_intc_map(struct irq_domain *d, unsigned int irq,
		irq_hw_number_t hw)
		{