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Commit 85b3cce8 authored by Russell King's avatar Russell King
Browse files

ARM: Fix ioremap_cached()/ioremap_wc() for SMP platforms 



Write combining/cached device mappings are not setting the shared bit,
which could potentially cause problems on SMP systems since the cache
lines won't participate in the cache coherency protocol.

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
Tested-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent 9823f1a8

arch/arm/mm/mmu.c

+4 −0
Original line number Original line Diff line number Diff line
@@ -420,6 +420,10 @@ static void __init build_mem_type_table(void) 
		user_pgprot |= L_PTE_SHARED;

		user_pgprot |= L_PTE_SHARED;

		kern_pgprot |= L_PTE_SHARED;

		kern_pgprot |= L_PTE_SHARED;

		vecs_pgprot |= L_PTE_SHARED;

		vecs_pgprot |= L_PTE_SHARED;

		mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_S;

		mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED;

		mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;

		mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;

		mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;

		mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;

		mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;

		mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;

#endif

#endif