Merge branch 'v3.15-next/cleanup-samsung-2' into v3.15-next/s2r-pm-samsung-2 (8460dc7f) · Commits · e / devices / android_kernel_fairphone_FP3

arch/arm/Kconfig.debug

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		@@ -1145,7 +1145,7 @@ config DEBUG_UART_8250_FLOW_CONTROL

		config DEBUG_UNCOMPRESS
		bool
		depends on ARCH_MULTIPLATFORM \|\| ARCH_MSM
		depends on ARCH_MULTIPLATFORM \|\| ARCH_MSM \|\| PLAT_SAMSUNG
		default y if DEBUG_LL && !DEBUG_OMAP2PLUS_UART && \
		(!DEBUG_TEGRA_UART \|\| !ZBOOT_ROM)
		help
		@@ -1161,7 +1161,8 @@ config DEBUG_UNCOMPRESS

		config UNCOMPRESS_INCLUDE
		string
		default "debug/uncompress.h" if ARCH_MULTIPLATFORM \|\| ARCH_MSM
		default "debug/uncompress.h" if ARCH_MULTIPLATFORM \|\| ARCH_MSM \|\| \
		PLAT_SAMSUNG
		default "mach/uncompress.h"

		config EARLY_PRINTK

+1 −1

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		@@ -9,7 +9,7 @@
		* published by the Free Software Foundation.
		*/

		#include <plat/regs-serial.h>
		#include <linux/serial_s3c.h>

		/* The S5PV210/S5PC110 implementations are as belows. */

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		@@ -20,6 +20,7 @@
		#include <clocksource/samsung_pwm.h>
		#include <linux/sched.h>
		#include <linux/serial_core.h>
		#include <linux/serial_s3c.h>
		#include <linux/of.h>
		#include <linux/of_fdt.h>
		#include <linux/of_irq.h>
		@@ -40,7 +41,6 @@

		#include <plat/cpu.h>
		#include <plat/pm.h>
		#include <plat/regs-serial.h>

		#include "common.h"
		#include "regs-pmu.h"

deleted100644 → 0

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		/*
		* Copyright (c) 2010-2012 Samsung Electronics Co., Ltd.
		* http://www.samsung.com
		*
		* EXYNOS - uncompress code
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 as
		* published by the Free Software Foundation.
		*/

		#ifndef __ASM_ARCH_UNCOMPRESS_H
		#define __ASM_ARCH_UNCOMPRESS_H __FILE__

		#include <asm/mach-types.h>

		#include <mach/map.h>
		#include <plat/uncompress.h>

		static unsigned int __raw_readl(unsigned int ptr)
		{
		return ((volatile unsigned int )ptr);
		}

		static void arch_detect_cpu(void)
		{
		u32 chip_id = __raw_readl(EXYNOS_PA_CHIPID);

		/*
		* product_id is bits 31:12
		* bits 23:20 describe the exynosX family
		* bits 27:24 describe the exynosX family in exynos5420
		*/
		chip_id >>= 20;

		if ((chip_id & 0x0f) == 0x5 \|\| (chip_id & 0xf0) == 0x50)
		uart_base = (volatile u8 )EXYNOS5_PA_UART + (S3C_UART_OFFSET CONFIG_S3C_LOWLEVEL_UART_PORT);
		else
		uart_base = (volatile u8 )EXYNOS4_PA_UART + (S3C_UART_OFFSET CONFIG_S3C_LOWLEVEL_UART_PORT);

		/*
		* For preventing FIFO overrun or infinite loop of UART console,
		* fifo_max should be the minimum fifo size of all of the UART channels
		*/
		fifo_mask = S5PV210_UFSTAT_TXMASK;
		fifo_max = 15 << S5PV210_UFSTAT_TXSHIFT;
		}
		#endif /* __ASM_ARCH_UNCOMPRESS_H */

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