Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8254c7e5 authored by Sunil Khatri's avatar Sunil Khatri
Browse files

ARM: dts: msm: Add CPZ support for SDM439 



SDM439 supports CPZ and need support for
Secure PIL loading.

Change-Id: I2abdd318cafa0d54fdf7e4f9d750d02e5dc338ef
Signed-off-by: default avatarSunil Khatri <sunilkh@codeaurora.org>
parent 91eddfa4

arch/arm64/boot/dts/qcom/sdm439.dtsi

+27 −0
Original line number Diff line number Diff line
@@ -101,3 +101,30 @@ 
		size = <0 0x800000>;

	};

};



&soc {

	pil_gpu: qcom,kgsl-hyp {

		compatible = "qcom,pil-tz-generic";

		qcom,pas-id = <13>;

		qcom,firmware-name = "a506_zap";

		memory-region = <&gpu_mem>;

		qcom,mas-crypto = <&mas_crypto>;

		clocks = <&clock_gcc clk_gcc_crypto_clk>,

		<&clock_gcc clk_gcc_crypto_ahb_clk>,

		<&clock_gcc clk_gcc_crypto_axi_clk>,

		<&clock_gcc clk_crypto_clk_src>;

		clock-names = "scm_core_clk", "scm_iface_clk",

				"scm_bus_clk", "scm_core_clk_src";

		qcom,proxy-clock-names = "scm_core_clk", "scm_iface_clk",

				"scm_bus_clk", "scm_core_clk_src";

		qcom,scm_core_clk_src-freq = <80000000>;

	};

};



&kgsl_msm_iommu {

	gfx3d_secure: gfx3d_secure {

		compatible = "qcom,smmu-kgsl-cb";

		iommus = <&kgsl_smmu 2>;

		memory-region = <&secure_mem>;

	};

};