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Commit 8240a10d authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add sched energy data for msm8937"

parents 6e97d407 74c5cc2f

arch/arm64/boot/dts/qcom/msm8937-cpu.dtsi

+69 −0
Original line number Diff line number Diff line
@@ -57,6 +57,8 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x100>;

			enable-method = "psci";

			efficiency = <1126>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_1>;

			next-level-cache = <&L2_1>;

			L2_1: l2-cache {

			      compatible = "arm,arch-cache";
@@ -79,6 +81,8 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x101>;

			enable-method = "psci";

			efficiency = <1126>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_1>;

			next-level-cache = <&L2_1>;

			L1_I_101: l1-icache {

				compatible = "arm,arch-cache";
@@ -95,6 +99,8 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x102>;

			enable-method = "psci";

			efficiency = <1126>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_1>;

			next-level-cache = <&L2_1>;

			L1_I_102: l1-icache {

				compatible = "arm,arch-cache";
@@ -111,6 +117,8 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x103>;

			enable-method = "psci";

			efficiency = <1126>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_1>;

			next-level-cache = <&L2_1>;

			L1_I_103: l1-icache {

				compatible = "arm,arch-cache";
@@ -127,6 +135,8 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x0>;

			enable-method = "psci";

			efficiency = <1024>;

			sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_0>;

			next-level-cache = <&L2_0>;

			L2_0: l2-cache {

			      compatible = "arm,arch-cache";
@@ -148,6 +158,8 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x1>;

			enable-method = "psci";

			efficiency = <1024>;

			sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_0>;

			next-level-cache = <&L2_0>;

			L1_I_1: l1-icache {

				compatible = "arm,arch-cache";
@@ -164,6 +176,8 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x2>;

			enable-method = "psci";

			efficiency = <1024>;

			sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_0>;

			next-level-cache = <&L2_0>;

			L1_I_2: l1-icache {

				compatible = "arm,arch-cache";
@@ -180,6 +194,8 @@ 
			compatible = "arm,cortex-a53";

			reg = <0x3>;

			enable-method = "psci";

			efficiency = <1024>;

			sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_0>;

			next-level-cache = <&L2_0>;

			L1_I_3: l1-icache {

				compatible = "arm,arch-cache";
@@ -191,4 +207,57 @@ 
			};

		};

	};



	energy_costs: energy-costs {

		compatible = "sched-energy";



		CPU_COST_0: core-cost0 {

			busy-cost-data = <

				 700000  623

				1000000  917

				1100000  1106

				1250000  1432

				1400000  1740

			>;

			idle-cost-data = <

				100 80 60 40

			>;

		};

		CPU_COST_1: core-cost1 {

			busy-cost-data = <

				 500000  70

				 800000  114

				 900000  141

				1000000  178

				1100000  213

			>;

			idle-cost-data = <

				40 20 10 8

			>;

		};

		CLUSTER_COST_0: cluster-cost0 {

			busy-cost-data = <

				 500000  19

				 800000  29

				 900000  36

				1000000  46

				1100000  55

			>;

			idle-cost-data = <

				4 3 2 1

			>;

		};

		CLUSTER_COST_1: cluster-cost1 {

			busy-cost-data = <

				 700000  85

				1000000  126

				1100000  152

				1250000  197

				1400000  239

			>;

			idle-cost-data = <

				4 3 2 1

			>;

		};

	};

};