Loading arch/arm64/boot/dts/qcom/msmskunk.dtsi +30 −0 Original line number Diff line number Diff line Loading @@ -640,6 +640,36 @@ status = "ok"; }; qcom,spss@1880000 { compatible = "qcom,pil-tz-generic"; reg = <0x188101c 0x4>, <0x1881024 0x4>, <0x1881028 0x4>, <0x188103c 0x4>, <0x1882014 0x4>; reg-names = "sp2soc_irq_status", "sp2soc_irq_clr", "sp2soc_irq_mask", "rmb_err", "rmb_err_spare2"; interrupts = <0 352 1>; vdd_cx-supply = <&pmcobalt_s9_level>; qcom,proxy-reg-names = "vdd_cx"; qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_MAX 100000>; vdd_mx-supply = <&pmcobalt_s6_level>; vdd_mx-uV = <RPMH_REGULATOR_LEVEL_MAX 100000>; clocks = <&clock_gcc RPMH_CXO_CLK>; clock-names = "xo"; qcom,proxy-clock-names = "xo"; qcom,pil-generic-irq-handler; status = "ok"; qcom,pas-id = <14>; qcom,proxy-timeout-ms = <10000>; qcom,firmware-name = "spss"; memory-region = <&pil_spss_mem>; qcom,spss-scsr-bits = <24 25>; }; wdog: qcom,wdt@17980000{ compatible = "qcom,msm-watchdog"; reg = <0x17980000 0x1000>; Loading Loading
arch/arm64/boot/dts/qcom/msmskunk.dtsi +30 −0 Original line number Diff line number Diff line Loading @@ -640,6 +640,36 @@ status = "ok"; }; qcom,spss@1880000 { compatible = "qcom,pil-tz-generic"; reg = <0x188101c 0x4>, <0x1881024 0x4>, <0x1881028 0x4>, <0x188103c 0x4>, <0x1882014 0x4>; reg-names = "sp2soc_irq_status", "sp2soc_irq_clr", "sp2soc_irq_mask", "rmb_err", "rmb_err_spare2"; interrupts = <0 352 1>; vdd_cx-supply = <&pmcobalt_s9_level>; qcom,proxy-reg-names = "vdd_cx"; qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_MAX 100000>; vdd_mx-supply = <&pmcobalt_s6_level>; vdd_mx-uV = <RPMH_REGULATOR_LEVEL_MAX 100000>; clocks = <&clock_gcc RPMH_CXO_CLK>; clock-names = "xo"; qcom,proxy-clock-names = "xo"; qcom,pil-generic-irq-handler; status = "ok"; qcom,pas-id = <14>; qcom,proxy-timeout-ms = <10000>; qcom,firmware-name = "spss"; memory-region = <&pil_spss_mem>; qcom,spss-scsr-bits = <24 25>; }; wdog: qcom,wdt@17980000{ compatible = "qcom,msm-watchdog"; reg = <0x17980000 0x1000>; Loading