Loading arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi +3 −2 Original line number Diff line number Diff line Loading @@ -329,9 +329,10 @@ compatible = "qcom,gmu-pwrlevels"; /* GMU power levels must go from lowest to highest */ qcom,gmu-pwrlevel@0 { reg = <0>; qcom,gmu-freq = <400000000>; qcom,gmu-freq = <0>; }; qcom,gmu-pwrlevel@1 { Loading @@ -341,7 +342,7 @@ qcom,gmu-pwrlevel@2 { reg = <2>; qcom,gmu-freq = <0>; qcom,gmu-freq = <400000000>; }; }; Loading arch/arm64/boot/dts/qcom/sdm845-v2.dtsi +3 −2 Original line number Diff line number Diff line Loading @@ -1475,9 +1475,10 @@ compatible = "qcom,gmu-pwrlevels"; /* GMU power levels must go from lowest to highest */ qcom,gmu-pwrlevel@0 { reg = <0>; qcom,gmu-freq = <500000000>; qcom,gmu-freq = <0>; }; qcom,gmu-pwrlevel@1 { Loading @@ -1487,7 +1488,7 @@ qcom,gmu-pwrlevel@2 { reg = <2>; qcom,gmu-freq = <0>; qcom,gmu-freq = <500000000>; }; }; }; Loading Loading
arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi +3 −2 Original line number Diff line number Diff line Loading @@ -329,9 +329,10 @@ compatible = "qcom,gmu-pwrlevels"; /* GMU power levels must go from lowest to highest */ qcom,gmu-pwrlevel@0 { reg = <0>; qcom,gmu-freq = <400000000>; qcom,gmu-freq = <0>; }; qcom,gmu-pwrlevel@1 { Loading @@ -341,7 +342,7 @@ qcom,gmu-pwrlevel@2 { reg = <2>; qcom,gmu-freq = <0>; qcom,gmu-freq = <400000000>; }; }; Loading
arch/arm64/boot/dts/qcom/sdm845-v2.dtsi +3 −2 Original line number Diff line number Diff line Loading @@ -1475,9 +1475,10 @@ compatible = "qcom,gmu-pwrlevels"; /* GMU power levels must go from lowest to highest */ qcom,gmu-pwrlevel@0 { reg = <0>; qcom,gmu-freq = <500000000>; qcom,gmu-freq = <0>; }; qcom,gmu-pwrlevel@1 { Loading @@ -1487,7 +1488,7 @@ qcom,gmu-pwrlevel@2 { reg = <2>; qcom,gmu-freq = <0>; qcom,gmu-freq = <500000000>; }; }; }; Loading