Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 81a65253 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Configure BLSP6-UART6 for MSM8953"

parents f1ef67c3 5d54a0be

arch/arm64/boot/dts/qcom/msm8953-pinctrl.dtsi

+26 −0
Original line number Diff line number Diff line
@@ -599,6 +599,32 @@ 
			};

		};



		blsp2_uart1_active: blsp2_uart1_active {

			mux {

				pins = "gpio20", "gpio21", "gpio22", "gpio23";

				function = "blsp_uart6";

			};



			config {

				pins = "gpio20", "gpio21", "gpio22", "gpio23";

				drive-strength = <16>;

				bias-disable;

			};

		};



		blsp2_uart1_sleep: blsp2_uart1_sleep {

			mux {

				pins = "gpio20", "gpio21", "gpio22", "gpio23";

				function = "gpio";

			};



			config {

				pins = "gpio20", "gpio21", "gpio22", "gpio23";

				drive-strength = <2>;

				bias-disable;

			};

		};



		/* SDC pin type */

		sdc1_clk_on: sdc1_clk_on {

			config {

arch/arm64/boot/dts/qcom/msm8953.dtsi

+36 −0
Original line number Diff line number Diff line
@@ -613,6 +613,42 @@ 
		status = "disabled";

	};



	blsp2_uart1: uart@7af0000 {

		compatible = "qcom,msm-hsuart-v14";

		reg = <0x7af0000 0x200>,

			<0x7ac4000 0x1f000>;

		reg-names = "core_mem", "bam_mem";



		interrupt-names = "core_irq", "bam_irq", "wakeup_irq";

		#address-cells = <0>;

		interrupt-parent = <&blsp2_uart1>;

		interrupts = <0 1 2>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 307 0

				1 &intc 0 239 0

				2 &tlmm 21 0>;



		qcom,inject-rx-on-wakeup;

		qcom,rx-char-to-inject = <0xFD>;

		qcom,master-id = <84>;

		clock-names = "core_clk", "iface_clk";

		clocks = <&clock_gcc clk_gcc_blsp2_uart2_apps_clk>,

			<&clock_gcc clk_gcc_blsp2_ahb_clk>;

		pinctrl-names = "sleep", "default";

		pinctrl-0 = <&blsp2_uart1_sleep>;

		pinctrl-1 = <&blsp2_uart1_active>;

		qcom,bam-tx-ep-pipe-index = <2>;

		qcom,bam-rx-ep-pipe-index = <3>;

		qcom,msm-bus,name = "blsp2_uart1";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<84 512 0 0>,

				<84 512 500 800>;

		status = "disabled";

	};



	blsp1_serial1: serial@78b0000 {

		compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";

		reg = <0x78b0000 0x200>;