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Commit 819c1de3 authored by James Hogan's avatar James Hogan Committed by Mike Turquette
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clk: add CLK_SET_RATE_NO_REPARENT flag 



Add a CLK_SET_RATE_NO_REPARENT clock flag, which will prevent muxes
being reparented during clk_set_rate.

To avoid breaking existing platforms, all callers of clk_register_mux()
are adjusted to pass the new flag. Platform maintainers are encouraged
to remove the flag if they wish to allow mux reparenting on set_rate.

Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Reviewed-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Chao Xie <xiechao.mail@gmail.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: "Emilio López" <emilio@elopez.com.ar>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Andrew Chew <achew@nvidia.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: spear-devel@list.st.com
Cc: linux-tegra@vger.kernel.org
Tested-by: default avatarHaojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com> [tegra]
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> [sunxi]
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> [Zynq]
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
parent 71472c0c

arch/arm/mach-imx/clk.h

+3 −2
Original line number Diff line number Diff line
@@ -79,7 +79,8 @@ static inline struct clk *imx_clk_gate(const char *name, const char *parent, 
static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,

		u8 shift, u8 width, const char **parents, int num_parents)

{

	return clk_register_mux(NULL, name, parents, num_parents, 0, reg, shift,

	return clk_register_mux(NULL, name, parents, num_parents,

			CLK_SET_RATE_NO_REPARENT, reg, shift,

			width, 0, &imx_ccm_lock);

}
@@ -88,7 +89,7 @@ static inline struct clk *imx_clk_mux_flags(const char *name, 
		int num_parents, unsigned long flags)

{

	return clk_register_mux(NULL, name, parents, num_parents,

			flags, reg, shift, width, 0,

			flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0,

			&imx_ccm_lock);

}

drivers/clk/mmp/clk-mmp2.c

+26 −13
Original line number Diff line number Diff line
@@ -248,7 +248,8 @@ void __init mmp2_clk_init(void) 
	clk_register_clkdev(clk, NULL, "mmp2-pwm.3");



	clk = clk_register_mux(NULL, "uart0_mux", uart_parent,

				ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(uart_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);

	clk_set_parent(clk, vctcxo);

	clk_register_clkdev(clk, "uart_mux.0", NULL);
@@ -258,7 +259,8 @@ void __init mmp2_clk_init(void) 
	clk_register_clkdev(clk, NULL, "pxa2xx-uart.0");



	clk = clk_register_mux(NULL, "uart1_mux", uart_parent,

				ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(uart_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);

	clk_set_parent(clk, vctcxo);

	clk_register_clkdev(clk, "uart_mux.1", NULL);
@@ -268,7 +270,8 @@ void __init mmp2_clk_init(void) 
	clk_register_clkdev(clk, NULL, "pxa2xx-uart.1");



	clk = clk_register_mux(NULL, "uart2_mux", uart_parent,

				ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(uart_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_UART2, 4, 3, 0, &clk_lock);

	clk_set_parent(clk, vctcxo);

	clk_register_clkdev(clk, "uart_mux.2", NULL);
@@ -278,7 +281,8 @@ void __init mmp2_clk_init(void) 
	clk_register_clkdev(clk, NULL, "pxa2xx-uart.2");



	clk = clk_register_mux(NULL, "uart3_mux", uart_parent,

				ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(uart_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_UART3, 4, 3, 0, &clk_lock);

	clk_set_parent(clk, vctcxo);

	clk_register_clkdev(clk, "uart_mux.3", NULL);
@@ -288,7 +292,8 @@ void __init mmp2_clk_init(void) 
	clk_register_clkdev(clk, NULL, "pxa2xx-uart.3");



	clk = clk_register_mux(NULL, "ssp0_mux", ssp_parent,

				ARRAY_SIZE(ssp_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(ssp_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_SSP0, 4, 3, 0, &clk_lock);

	clk_register_clkdev(clk, "uart_mux.0", NULL);
@@ -297,7 +302,8 @@ void __init mmp2_clk_init(void) 
	clk_register_clkdev(clk, NULL, "mmp-ssp.0");



	clk = clk_register_mux(NULL, "ssp1_mux", ssp_parent,

				ARRAY_SIZE(ssp_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(ssp_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock);

	clk_register_clkdev(clk, "ssp_mux.1", NULL);
@@ -306,7 +312,8 @@ void __init mmp2_clk_init(void) 
	clk_register_clkdev(clk, NULL, "mmp-ssp.1");



	clk = clk_register_mux(NULL, "ssp2_mux", ssp_parent,

				ARRAY_SIZE(ssp_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(ssp_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_SSP2, 4, 3, 0, &clk_lock);

	clk_register_clkdev(clk, "ssp_mux.2", NULL);
@@ -315,7 +322,8 @@ void __init mmp2_clk_init(void) 
	clk_register_clkdev(clk, NULL, "mmp-ssp.2");



	clk = clk_register_mux(NULL, "ssp3_mux", ssp_parent,

				ARRAY_SIZE(ssp_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(ssp_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_SSP3, 4, 3, 0, &clk_lock);

	clk_register_clkdev(clk, "ssp_mux.3", NULL);
@@ -324,7 +332,8 @@ void __init mmp2_clk_init(void) 
	clk_register_clkdev(clk, NULL, "mmp-ssp.3");



	clk = clk_register_mux(NULL, "sdh_mux", sdh_parent,

				ARRAY_SIZE(sdh_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(sdh_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apmu_base + APMU_SDH0, 8, 2, 0, &clk_lock);

	clk_register_clkdev(clk, "sdh_mux", NULL);
@@ -354,7 +363,8 @@ void __init mmp2_clk_init(void) 
	clk_register_clkdev(clk, "usb_clk", NULL);



	clk = clk_register_mux(NULL, "disp0_mux", disp_parent,

				ARRAY_SIZE(disp_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(disp_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apmu_base + APMU_DISP0, 6, 2, 0, &clk_lock);

	clk_register_clkdev(clk, "disp_mux.0", NULL);
@@ -376,7 +386,8 @@ void __init mmp2_clk_init(void) 
	clk_register_clkdev(clk, "disp_sphy.0", NULL);



	clk = clk_register_mux(NULL, "disp1_mux", disp_parent,

				ARRAY_SIZE(disp_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(disp_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apmu_base + APMU_DISP1, 6, 2, 0, &clk_lock);

	clk_register_clkdev(clk, "disp_mux.1", NULL);
@@ -394,7 +405,8 @@ void __init mmp2_clk_init(void) 
	clk_register_clkdev(clk, "ccic_arbiter", NULL);



	clk = clk_register_mux(NULL, "ccic0_mux", ccic_parent,

				ARRAY_SIZE(ccic_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(ccic_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apmu_base + APMU_CCIC0, 6, 2, 0, &clk_lock);

	clk_register_clkdev(clk, "ccic_mux.0", NULL);
@@ -421,7 +433,8 @@ void __init mmp2_clk_init(void) 
	clk_register_clkdev(clk, "sphyclk", "mmp-ccic.0");



	clk = clk_register_mux(NULL, "ccic1_mux", ccic_parent,

				ARRAY_SIZE(ccic_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(ccic_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apmu_base + APMU_CCIC1, 6, 2, 0, &clk_lock);

	clk_register_clkdev(clk, "ccic_mux.1", NULL);

drivers/clk/mmp/clk-pxa168.c

+26 −14
Original line number Diff line number Diff line
@@ -199,7 +199,8 @@ void __init pxa168_clk_init(void) 
	clk_register_clkdev(clk, NULL, "pxa168-pwm.3");



	clk = clk_register_mux(NULL, "uart0_mux", uart_parent,

				ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(uart_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);

	clk_set_parent(clk, uart_pll);

	clk_register_clkdev(clk, "uart_mux.0", NULL);
@@ -209,7 +210,8 @@ void __init pxa168_clk_init(void) 
	clk_register_clkdev(clk, NULL, "pxa2xx-uart.0");



	clk = clk_register_mux(NULL, "uart1_mux", uart_parent,

				ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(uart_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);

	clk_set_parent(clk, uart_pll);

	clk_register_clkdev(clk, "uart_mux.1", NULL);
@@ -219,7 +221,8 @@ void __init pxa168_clk_init(void) 
	clk_register_clkdev(clk, NULL, "pxa2xx-uart.1");



	clk = clk_register_mux(NULL, "uart2_mux", uart_parent,

				ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(uart_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_UART2, 4, 3, 0, &clk_lock);

	clk_set_parent(clk, uart_pll);

	clk_register_clkdev(clk, "uart_mux.2", NULL);
@@ -229,7 +232,8 @@ void __init pxa168_clk_init(void) 
	clk_register_clkdev(clk, NULL, "pxa2xx-uart.2");



	clk = clk_register_mux(NULL, "ssp0_mux", ssp_parent,

				ARRAY_SIZE(ssp_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(ssp_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_SSP0, 4, 3, 0, &clk_lock);

	clk_register_clkdev(clk, "uart_mux.0", NULL);
@@ -238,7 +242,8 @@ void __init pxa168_clk_init(void) 
	clk_register_clkdev(clk, NULL, "mmp-ssp.0");



	clk = clk_register_mux(NULL, "ssp1_mux", ssp_parent,

				ARRAY_SIZE(ssp_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(ssp_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock);

	clk_register_clkdev(clk, "ssp_mux.1", NULL);
@@ -247,7 +252,8 @@ void __init pxa168_clk_init(void) 
	clk_register_clkdev(clk, NULL, "mmp-ssp.1");



	clk = clk_register_mux(NULL, "ssp2_mux", ssp_parent,

				ARRAY_SIZE(ssp_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(ssp_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_SSP2, 4, 3, 0, &clk_lock);

	clk_register_clkdev(clk, "ssp_mux.2", NULL);
@@ -256,7 +262,8 @@ void __init pxa168_clk_init(void) 
	clk_register_clkdev(clk, NULL, "mmp-ssp.2");



	clk = clk_register_mux(NULL, "ssp3_mux", ssp_parent,

				ARRAY_SIZE(ssp_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(ssp_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_SSP3, 4, 3, 0, &clk_lock);

	clk_register_clkdev(clk, "ssp_mux.3", NULL);
@@ -265,7 +272,8 @@ void __init pxa168_clk_init(void) 
	clk_register_clkdev(clk, NULL, "mmp-ssp.3");



	clk = clk_register_mux(NULL, "ssp4_mux", ssp_parent,

				ARRAY_SIZE(ssp_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(ssp_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_SSP4, 4, 3, 0, &clk_lock);

	clk_register_clkdev(clk, "ssp_mux.4", NULL);
@@ -278,7 +286,8 @@ void __init pxa168_clk_init(void) 
	clk_register_clkdev(clk, NULL, "pxa3xx-nand.0");



	clk = clk_register_mux(NULL, "sdh0_mux", sdh_parent,

				ARRAY_SIZE(sdh_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(sdh_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apmu_base + APMU_SDH0, 6, 1, 0, &clk_lock);

	clk_register_clkdev(clk, "sdh0_mux", NULL);
@@ -287,7 +296,8 @@ void __init pxa168_clk_init(void) 
	clk_register_clkdev(clk, NULL, "sdhci-pxa.0");



	clk = clk_register_mux(NULL, "sdh1_mux", sdh_parent,

				ARRAY_SIZE(sdh_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(sdh_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apmu_base + APMU_SDH1, 6, 1, 0, &clk_lock);

	clk_register_clkdev(clk, "sdh1_mux", NULL);
@@ -304,7 +314,8 @@ void __init pxa168_clk_init(void) 
	clk_register_clkdev(clk, "sph_clk", NULL);



	clk = clk_register_mux(NULL, "disp0_mux", disp_parent,

				ARRAY_SIZE(disp_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(disp_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apmu_base + APMU_DISP0, 6, 1, 0, &clk_lock);

	clk_register_clkdev(clk, "disp_mux.0", NULL);
@@ -317,7 +328,8 @@ void __init pxa168_clk_init(void) 
	clk_register_clkdev(clk, "hclk", "mmp-disp.0");



	clk = clk_register_mux(NULL, "ccic0_mux", ccic_parent,

				ARRAY_SIZE(ccic_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(ccic_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apmu_base + APMU_CCIC0, 6, 1, 0, &clk_lock);

	clk_register_clkdev(clk, "ccic_mux.0", NULL);
@@ -327,8 +339,8 @@ void __init pxa168_clk_init(void) 


	clk = clk_register_mux(NULL, "ccic0_phy_mux", ccic_phy_parent,

				ARRAY_SIZE(ccic_phy_parent),

				CLK_SET_RATE_PARENT, apmu_base + APMU_CCIC0,

				7, 1, 0, &clk_lock);

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apmu_base + APMU_CCIC0, 7, 1, 0, &clk_lock);

	clk_register_clkdev(clk, "ccic_phy_mux.0", NULL);



	clk = mmp_clk_register_apmu("ccic0_phy", "ccic0_phy_mux",

drivers/clk/mmp/clk-pxa910.c

+20 −11
Original line number Diff line number Diff line
@@ -204,7 +204,8 @@ void __init pxa910_clk_init(void) 
	clk_register_clkdev(clk, NULL, "pxa910-pwm.3");



	clk = clk_register_mux(NULL, "uart0_mux", uart_parent,

				ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(uart_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_UART0, 4, 3, 0, &clk_lock);

	clk_set_parent(clk, uart_pll);

	clk_register_clkdev(clk, "uart_mux.0", NULL);
@@ -214,7 +215,8 @@ void __init pxa910_clk_init(void) 
	clk_register_clkdev(clk, NULL, "pxa2xx-uart.0");



	clk = clk_register_mux(NULL, "uart1_mux", uart_parent,

				ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(uart_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_UART1, 4, 3, 0, &clk_lock);

	clk_set_parent(clk, uart_pll);

	clk_register_clkdev(clk, "uart_mux.1", NULL);
@@ -224,7 +226,8 @@ void __init pxa910_clk_init(void) 
	clk_register_clkdev(clk, NULL, "pxa2xx-uart.1");



	clk = clk_register_mux(NULL, "uart2_mux", uart_parent,

				ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(uart_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbcp_base + APBCP_UART2, 4, 3, 0, &clk_lock);

	clk_set_parent(clk, uart_pll);

	clk_register_clkdev(clk, "uart_mux.2", NULL);
@@ -234,7 +237,8 @@ void __init pxa910_clk_init(void) 
	clk_register_clkdev(clk, NULL, "pxa2xx-uart.2");



	clk = clk_register_mux(NULL, "ssp0_mux", ssp_parent,

				ARRAY_SIZE(ssp_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(ssp_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_SSP0, 4, 3, 0, &clk_lock);

	clk_register_clkdev(clk, "uart_mux.0", NULL);
@@ -243,7 +247,8 @@ void __init pxa910_clk_init(void) 
	clk_register_clkdev(clk, NULL, "mmp-ssp.0");



	clk = clk_register_mux(NULL, "ssp1_mux", ssp_parent,

				ARRAY_SIZE(ssp_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(ssp_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock);

	clk_register_clkdev(clk, "ssp_mux.1", NULL);
@@ -256,7 +261,8 @@ void __init pxa910_clk_init(void) 
	clk_register_clkdev(clk, NULL, "pxa3xx-nand.0");



	clk = clk_register_mux(NULL, "sdh0_mux", sdh_parent,

				ARRAY_SIZE(sdh_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(sdh_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apmu_base + APMU_SDH0, 6, 1, 0, &clk_lock);

	clk_register_clkdev(clk, "sdh0_mux", NULL);
@@ -265,7 +271,8 @@ void __init pxa910_clk_init(void) 
	clk_register_clkdev(clk, NULL, "sdhci-pxa.0");



	clk = clk_register_mux(NULL, "sdh1_mux", sdh_parent,

				ARRAY_SIZE(sdh_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(sdh_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apmu_base + APMU_SDH1, 6, 1, 0, &clk_lock);

	clk_register_clkdev(clk, "sdh1_mux", NULL);
@@ -282,7 +289,8 @@ void __init pxa910_clk_init(void) 
	clk_register_clkdev(clk, "sph_clk", NULL);



	clk = clk_register_mux(NULL, "disp0_mux", disp_parent,

				ARRAY_SIZE(disp_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(disp_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apmu_base + APMU_DISP0, 6, 1, 0, &clk_lock);

	clk_register_clkdev(clk, "disp_mux.0", NULL);
@@ -291,7 +299,8 @@ void __init pxa910_clk_init(void) 
	clk_register_clkdev(clk, NULL, "mmp-disp.0");



	clk = clk_register_mux(NULL, "ccic0_mux", ccic_parent,

				ARRAY_SIZE(ccic_parent), CLK_SET_RATE_PARENT,

				ARRAY_SIZE(ccic_parent),

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apmu_base + APMU_CCIC0, 6, 1, 0, &clk_lock);

	clk_register_clkdev(clk, "ccic_mux.0", NULL);
@@ -301,8 +310,8 @@ void __init pxa910_clk_init(void) 


	clk = clk_register_mux(NULL, "ccic0_phy_mux", ccic_phy_parent,

				ARRAY_SIZE(ccic_phy_parent),

				CLK_SET_RATE_PARENT, apmu_base + APMU_CCIC0,

				7, 1, 0, &clk_lock);

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				apmu_base + APMU_CCIC0, 7, 1, 0, &clk_lock);

	clk_register_clkdev(clk, "ccic_phy_mux.0", NULL);



	clk = mmp_clk_register_apmu("ccic0_phy", "ccic0_phy_mux",

drivers/clk/mxs/clk.h

+2 −2
Original line number Diff line number Diff line
@@ -52,8 +52,8 @@ static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg, 
		u8 shift, u8 width, const char **parent_names, int num_parents)

{

	return clk_register_mux(NULL, name, parent_names, num_parents,

				CLK_SET_RATE_PARENT, reg, shift, width,

				0, &mxs_lock);

				CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,

				reg, shift, width, 0, &mxs_lock);

}



static inline struct clk *mxs_clk_fixed_factor(const char *name,