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Commit 802047a1 authored by Karthikeyan Mani's avatar Karthikeyan Mani Committed by Banajit Goswami
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ASoC: msm: Update proper clock frequency for slave mode 



Clock framework in LPASS expects valid clock frequency
for slave mode (EBIT) as well. This is required to maintain
corresponding voltage as per respective frequencies by clock
team in frequency plan. Avoid sending zero clock frequency
in clock enable even though it is slave mode.

Change-Id: If3d6ac4f1e7ce2032dbaa0e0475e8e1abd2692e8
Signed-off-by: default avatarKarthikeyan Mani <kmani@codeaurora.org>
parent 1a3178e4

sound/soc/msm/msm8998.c

+0 −3
Original line number Diff line number Diff line
@@ -4163,9 +4163,6 @@ static void update_mi2s_clk_val(int dai_id, int stream) 
		mi2s_clk[dai_id].clk_freq_in_hz =

		    mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;

	}



	if (!mi2s_intf_conf[dai_id].msm_is_mi2s_master)

		mi2s_clk[dai_id].clk_freq_in_hz = 0;

}



static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)