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Commit 80014ad5 authored by Thomas Petazzoni's avatar Thomas Petazzoni Committed by Bjorn Helgaas
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dt-bindings: pci: add DT binding for Marvell Armada 7K/8K PCIe controller



This commit adds the Device Tree binding documentation that allows to
describe the PCIe controller found in Marvell Armada 7K/8K SoCs.

Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: default avatarRob Herring <rob@kernel.org>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent 9735a227
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* Marvell Armada 7K/8K PCIe interface

This PCIe host controller is based on the Synopsis Designware PCIe IP
and thus inherits all the common properties defined in designware-pcie.txt.

Required properties:
- compatible: "marvell,armada8k-pcie"
- reg: must contain two register regions
   - the control register region
   - the config space region
- reg-names:
   - "ctrl" for the control register region
   - "config" for the config space region
- interrupts: Interrupt specifier for the PCIe controler
- clocks: reference to the PCIe controller clock

Example:

	pcie@f2600000 {
		compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
		reg = <0 0xf2600000 0 0x10000>, <0 0xf6f00000 0 0x80000>;
		reg-names = "ctrl", "config";
		#address-cells = <3>;
		#size-cells = <2>;
		#interrupt-cells = <1>;
		device_type = "pci";
		dma-coherent;

		bus-range = <0 0xff>;
		ranges = <0x81000000 0 0xf9000000 0  0xf9000000 0 0x10000	/* downstream I/O */
			  0x82000000 0 0xf6000000 0  0xf6000000 0 0xf00000>;	/* non-prefetchable memory */
		interrupt-map-mask = <0 0 0 0>;
		interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
		num-lanes = <1>;
		clocks = <&cpm_syscon0 1 13>;
		status = "disabled";
	};