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Commit 7f2de817 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'byteswap-for-linus-20121219' of git://git.infradead.org/users/dwmw2/byteswap

Pull preparatory gcc intrisics bswap patch from David Woodhouse:
 "This single patch is effectively a no-op for now.  It enables
  architectures to opt in to using GCC's __builtin_bswapXX() intrinsics
  for byteswapping, and if we merge this now then the architecture
  maintainers can enable it for their arch during the next cycle without
  dependency issues.

  It's worth making it a par-arch opt-in, because although in *theory*
  the compiler should never do worse than hand-coded assembler (and of
  course it also ought to do a lot better on platforms like Atom and
  PowerPC which have load-and-swap or store-and-swap instructions), that
  isn't always the case.  See

     http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46453

  for example."

* tag 'byteswap-for-linus-20121219' of git://git.infradead.org/users/dwmw2/byteswap:
  byteorder: allow arch to opt to use GCC intrinsics for byteswapping
parents 59771079 cf66bb93
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+19 −0
Original line number Diff line number Diff line
@@ -113,6 +113,25 @@ config HAVE_EFFICIENT_UNALIGNED_ACCESS
	  See Documentation/unaligned-memory-access.txt for more
	  information on the topic of unaligned memory accesses.

config ARCH_USE_BUILTIN_BSWAP
       bool
       help
	 Modern versions of GCC (since 4.4) have builtin functions
	 for handling byte-swapping. Using these, instead of the old
	 inline assembler that the architecture code provides in the
	 __arch_bswapXX() macros, allows the compiler to see what's
	 happening and offers more opportunity for optimisation. In
	 particular, the compiler will be able to combine the byteswap
	 with a nearby load or store and use load-and-swap or
	 store-and-swap instructions if the architecture has them. It
	 should almost *never* result in code which is worse than the
	 hand-coded assembler in <asm/swab.h>.  But just in case it
	 does, the use of the builtins is optional.

	 Any architecture with load-and-swap or store-and-swap
	 instructions should set this. And it shouldn't hurt to set it
	 on architectures that don't have such instructions.

config HAVE_SYSCALL_WRAPPERS
	bool

+10 −0
Original line number Diff line number Diff line
@@ -63,3 +63,13 @@
#define __compiletime_warning(message) __attribute__((warning(message)))
#define __compiletime_error(message) __attribute__((error(message)))
#endif

#ifdef CONFIG_ARCH_USE_BUILTIN_BSWAP
#if __GNUC_MINOR__ >= 4
#define __HAVE_BUILTIN_BSWAP32__
#define __HAVE_BUILTIN_BSWAP64__
#endif
#if __GNUC_MINOR__ >= 8 || (defined(__powerpc__) && __GNUC_MINOR__ >= 6)
#define __HAVE_BUILTIN_BSWAP16__
#endif
#endif
+7 −0
Original line number Diff line number Diff line
@@ -29,3 +29,10 @@
#endif

#define uninitialized_var(x) x

#ifndef __HAVE_BUILTIN_BSWAP16__
/* icc has this, but it's called _bswap16 */
#define __HAVE_BUILTIN_BSWAP16__
#define __builtin_bswap16 _bswap16
#endif
+9 −3
Original line number Diff line number Diff line
@@ -45,7 +45,9 @@

static inline __attribute_const__ __u16 __fswab16(__u16 val)
{
#ifdef __arch_swab16
#ifdef __HAVE_BUILTIN_BSWAP16__
	return __builtin_bswap16(val);
#elif defined (__arch_swab16)
	return __arch_swab16(val);
#else
	return ___constant_swab16(val);
@@ -54,7 +56,9 @@ static inline __attribute_const__ __u16 __fswab16(__u16 val)

static inline __attribute_const__ __u32 __fswab32(__u32 val)
{
#ifdef __arch_swab32
#ifdef __HAVE_BUILTIN_BSWAP32__
	return __builtin_bswap32(val);
#elif defined(__arch_swab32)
	return __arch_swab32(val);
#else
	return ___constant_swab32(val);
@@ -63,7 +67,9 @@ static inline __attribute_const__ __u32 __fswab32(__u32 val)

static inline __attribute_const__ __u64 __fswab64(__u64 val)
{
#ifdef __arch_swab64
#ifdef __HAVE_BUILTIN_BSWAP64__
	return __builtin_bswap64(val);
#elif defined (__arch_swab64)
	return __arch_swab64(val);
#elif defined(__SWAB_64_THRU_32__)
	__u32 h = val >> 32;