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Commit 7eb90454 authored by Clarence Ip's avatar Clarence Ip
Browse files

drm/msm/sde: update rotate fetch for video mode 



Update the rotator prefetch value and associated flush mask
correctly for video mode. This allows the inline rotator
to be enabled/disabled on a frame to frame basis for video
mode panels.

CRs-Fixed: 2056550
Change-Id: Ibcd6c4bf3b7b3352bd097e6929e165f25d714583
Signed-off-by: default avatarClarence Ip <cip@codeaurora.org>
parent 7e5f0002

drivers/gpu/drm/msm/sde/sde_crtc.c

+10 −16
Original line number Diff line number Diff line
@@ -1117,7 +1117,6 @@ static void _sde_crtc_blend_setup_mixer(struct drm_crtc *crtc, 
	bool bg_alpha_enable[CRTC_DUAL_MIXERS] = {false};

	int zpos_cnt[CRTC_DUAL_MIXERS][SDE_STAGE_MAX + 1] = { {0} };

	int i;

	bool sbuf_mode = false;

	u32 prefill = 0;



	if (!sde_crtc || !mixer) {
@@ -1131,6 +1130,9 @@ static void _sde_crtc_blend_setup_mixer(struct drm_crtc *crtc, 
	cstate = to_sde_crtc_state(crtc->state);

	flush_sbuf = 0x0;



	cstate->sbuf_cfg.rot_op_mode = SDE_CTL_ROT_OP_MODE_OFFLINE;

	cstate->sbuf_prefill_line = 0;



	drm_atomic_crtc_for_each_plane(plane, crtc) {

		state = plane->state;

		if (!state)
@@ -1145,7 +1147,10 @@ static void _sde_crtc_blend_setup_mixer(struct drm_crtc *crtc, 
		fb = state->fb;



		if (sde_plane_is_sbuf_mode(plane, &prefill))

			sbuf_mode = true;

			cstate->sbuf_cfg.rot_op_mode =

					SDE_CTL_ROT_OP_MODE_INLINE_SYNC;

		if (prefill > cstate->sbuf_prefill_line)

			cstate->sbuf_prefill_line = prefill;



		sde_plane_get_ctl_flush(plane, ctl, &flush_mask, &flush_tmp);
@@ -1167,7 +1172,8 @@ static void _sde_crtc_blend_setup_mixer(struct drm_crtc *crtc, 
				state->src_x >> 16, state->src_y >> 16,

				state->src_w >> 16, state->src_h >> 16,

				state->crtc_x, state->crtc_y,

				state->crtc_w, state->crtc_h);

				state->crtc_w, state->crtc_h,

				cstate->sbuf_cfg.rot_op_mode);



		for (lm_idx = 0; lm_idx < sde_crtc->num_mixers; lm_idx++) {

			struct sde_rect intersect;
@@ -1221,20 +1227,8 @@ static void _sde_crtc_blend_setup_mixer(struct drm_crtc *crtc, 
					mixer, &cstate->dim_layer[i]);

	}



	if (ctl->ops.setup_sbuf_cfg) {

		cstate = to_sde_crtc_state(crtc->state);

		if (!sbuf_mode) {

			cstate->sbuf_cfg.rot_op_mode =

					SDE_CTL_ROT_OP_MODE_OFFLINE;

			cstate->sbuf_prefill_line = 0;

		} else {

			cstate->sbuf_cfg.rot_op_mode =

					SDE_CTL_ROT_OP_MODE_INLINE_SYNC;

			cstate->sbuf_prefill_line = prefill;

		}



	if (ctl->ops.setup_sbuf_cfg)

		ctl->ops.setup_sbuf_cfg(ctl, &cstate->sbuf_cfg);

	}



	_sde_crtc_program_lm_output_roi(crtc);

}

drivers/gpu/drm/msm/sde/sde_crtc.h

+6 −2
Original line number Diff line number Diff line
@@ -299,7 +299,7 @@ struct sde_crtc_state { 
	struct sde_core_perf_params cur_perf;

	struct sde_core_perf_params new_perf;

	struct sde_ctl_sbuf_cfg sbuf_cfg;

	u64 sbuf_prefill_line;

	u32 sbuf_prefill_line;

	u32 sbuf_flush_mask;



	struct sde_crtc_respool rp;
@@ -435,10 +435,14 @@ static inline bool sde_crtc_is_enabled(struct drm_crtc *crtc) 
 */

static inline u32 sde_crtc_get_inline_prefill(struct drm_crtc *crtc)

{

	struct sde_crtc_state *cstate;



	if (!crtc || !crtc->state)

		return 0;



	return to_sde_crtc_state(crtc->state)->sbuf_prefill_line;

	cstate = to_sde_crtc_state(crtc->state);

	return cstate->sbuf_cfg.rot_op_mode != SDE_CTL_ROT_OP_MODE_OFFLINE ?

		cstate->sbuf_prefill_line : 0;

}



/**

drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c

+11 −3
Original line number Diff line number Diff line
@@ -222,7 +222,7 @@ static void programmable_fetch_config(struct sde_encoder_phys *phys_enc, 
 * @rot_fetch_lines: number of line to prefill, or 0 to disable

 */

static void programmable_rot_fetch_config(struct sde_encoder_phys *phys_enc,

		u64 rot_fetch_lines)

		u32 rot_fetch_lines)

{

	struct sde_encoder_phys_vid *vid_enc =

		to_sde_encoder_phys_vid(phys_enc);
@@ -232,9 +232,12 @@ static void programmable_rot_fetch_config(struct sde_encoder_phys *phys_enc, 
	u32 horiz_total = 0;

	u32 vert_total = 0;

	u32 rot_fetch_start_vsync_counter = 0;

	u32 flush_mask = 0;

	unsigned long lock_flags;



	if (!phys_enc || !vid_enc->hw_intf ||

	if (!phys_enc || !vid_enc->hw_intf || !phys_enc->hw_ctl ||

			!phys_enc->hw_ctl->ops.get_bitmask_intf ||

			!phys_enc->hw_ctl->ops.update_pending_flush ||

			!vid_enc->hw_intf->ops.setup_rot_start)

		return;
@@ -253,9 +256,14 @@ static void programmable_rot_fetch_config(struct sde_encoder_phys *phys_enc, 
	}



	SDE_DEBUG_VIDENC(vid_enc,

		"rot_fetch_lines %llu rot_fetch_start_vsync_counter %u\n",

		"rot_fetch_lines %u rot_fetch_start_vsync_counter %u\n",

		rot_fetch_lines, rot_fetch_start_vsync_counter);



	phys_enc->hw_ctl->ops.get_bitmask_intf(

			phys_enc->hw_ctl, &flush_mask, vid_enc->hw_intf->idx);

	phys_enc->hw_ctl->ops.update_pending_flush(

			phys_enc->hw_ctl, flush_mask);



	spin_lock_irqsave(phys_enc->enc_spinlock, lock_flags);

	vid_enc->hw_intf->ops.setup_rot_start(vid_enc->hw_intf, &f);

	spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags);

drivers/gpu/drm/msm/sde/sde_plane.c

+8 −10
Original line number Diff line number Diff line
@@ -1368,33 +1368,31 @@ static struct sde_crtc_res_ops fbo_res_ops = { 
static u32 sde_plane_rot_calc_prefill(struct drm_plane *plane)

{

	struct drm_plane_state *state;

	struct drm_crtc_state *cstate;

	struct sde_plane_state *pstate;

	struct sde_plane_rot_state *rstate;

	struct sde_kms *sde_kms;

	u32 blocksize = 128;

	u32 prefill_line = 0;



	if (!plane || !plane->state || !plane->state->fb ||

			!plane->state->crtc || !plane->state->crtc->state) {

	if (!plane || !plane->state || !plane->state->fb) {

		SDE_ERROR("invalid parameters\n");

		return 0;

	}



	sde_kms = _sde_plane_get_kms(plane);

	state = plane->state;

	cstate = state->crtc->state;

	pstate = to_sde_plane_state(state);

	rstate = &pstate->rot;



	if (!rstate->rot_hw || !rstate->rot_hw->caps || !rstate->out_src_h ||

			!sde_kms || !sde_kms->catalog) {

		SDE_ERROR("invalid parameters\n");

	if (!sde_kms || !sde_kms->catalog) {

		SDE_ERROR("invalid kms\n");

		return 0;

	}



	sde_format_get_block_size(rstate->out_fb_format, &blocksize,

			&blocksize);

	if (rstate->out_fb_format)

		sde_format_get_block_size(rstate->out_fb_format,

				&blocksize, &blocksize);



	prefill_line = blocksize + sde_kms->catalog->sbuf_headroom;



	SDE_DEBUG("plane%d prefill:%u\n", plane->base.id, prefill_line);
@@ -1416,7 +1414,7 @@ bool sde_plane_is_sbuf_mode(struct drm_plane *plane, u32 *prefill) 
	struct sde_plane_rot_state *rstate = pstate ? &pstate->rot : NULL;

	bool sbuf_mode = rstate ? rstate->out_sbuf : false;



	if (prefill && sbuf_mode)

	if (prefill)

		*prefill = sde_plane_rot_calc_prefill(plane);



	return sbuf_mode;