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Commit 7e9dc742 authored by Rohit Rangwani's avatar Rohit Rangwani Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add NFC device node for MSM8953



Add NFC device tree node and associated GPIO configurations
for MSM8953 MTP, CDP and QRD platforms.

Change-Id: I7512c3cc09d4e0467407fbcebdf6c49c9c80fd60
Signed-off-by: default avatarRohit Rangwani <rrangwan@codeaurora.org>
parent 892b3aa7
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+33 −0
Original line number Diff line number Diff line
@@ -17,6 +17,39 @@
	pinctrl-0 = <&uart_console_active>;
};

&pm8953_gpios {
	nfc_clk {
		nfc_clk_default: nfc_clk_default {
			pins = "gpio2";
			function = "normal";
			input-enable;
			power-source = <1>;
		};
	};
};

&i2c_5 { /* BLSP2 QUP1 (NFC) */
	status = "ok";
	nq@28 {
		compatible = "qcom,nq-nci";
		reg = <0x28>;
		qcom,nq-irq = <&tlmm 17 0x00>;
		qcom,nq-ven = <&tlmm 16 0x00>;
		qcom,nq-firm = <&tlmm 62 0x00>;
		qcom,nq-clkreq = <&pm8953_gpios 2 0x00>;
		interrupt-parent = <&tlmm>;
		qcom,clk-src = "BBCLK2";
		interrupts = <17 0>;
		interrupt-names = "nfc_irq";
		pinctrl-names = "nfc_active", "nfc_suspend";
		pinctrl-0 = <&nfc_int_active &nfc_disable_active
						&nfc_clk_default>;
		pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;
		clocks = <&clock_gcc clk_bb_clk2_pin>;
		clock-names = "ref_clk";
	};
};

&sdhc_1 {
	/* device core power supply */
	vdd-supply = <&pm8953_l8>;
+33 −0
Original line number Diff line number Diff line
@@ -17,6 +17,39 @@
	pinctrl-0 = <&uart_console_active>;
};

&pm8953_gpios {
	nfc_clk {
		nfc_clk_default: nfc_clk_default {
			pins = "gpio2";
			function = "normal";
			input-enable;
			power-source = <1>;
		};
	};
};

&i2c_5 { /* BLSP2 QUP1 (NFC) */
	status = "ok";
	nq@28 {
		compatible = "qcom,nq-nci";
		reg = <0x28>;
		qcom,nq-irq = <&tlmm 17 0x00>;
		qcom,nq-ven = <&tlmm 16 0x00>;
		qcom,nq-firm = <&tlmm 62 0x00>;
		qcom,nq-clkreq = <&pm8953_gpios 2 0x00>;
		interrupt-parent = <&tlmm>;
		qcom,clk-src = "BBCLK2";
		interrupts = <17 0>;
		interrupt-names = "nfc_irq";
		pinctrl-names = "nfc_active", "nfc_suspend";
		pinctrl-0 = <&nfc_int_active &nfc_disable_active
						&nfc_clk_default>;
		pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;
		clocks = <&clock_gcc clk_bb_clk2_pin>;
		clock-names = "ref_clk";
	};
};

&sdhc_1 {
	/* device core power supply */
	vdd-supply = <&pm8953_l8>;
+33 −0
Original line number Diff line number Diff line
@@ -56,6 +56,39 @@
	pinctrl-0 = <&uart_console_active>;
};

&pm8953_gpios {
	nfc_clk {
		nfc_clk_default: nfc_clk_default {
			pins = "gpio2";
			function = "normal";
			input-enable;
			power-source = <1>;
		};
	};
};

&i2c_5 { /* BLSP2 QUP1 (NFC) */
	status = "ok";
	nq@28 {
		compatible = "qcom,nq-nci";
		reg = <0x28>;
		qcom,nq-irq = <&tlmm 17 0x00>;
		qcom,nq-ven = <&tlmm 16 0x00>;
		qcom,nq-firm = <&tlmm 62 0x00>;
		qcom,nq-clkreq = <&pm8953_gpios 2 0x00>;
		interrupt-parent = <&tlmm>;
		qcom,clk-src = "BBCLK2";
		interrupts = <17 0>;
		interrupt-names = "nfc_irq";
		pinctrl-names = "nfc_active", "nfc_suspend";
		pinctrl-0 = <&nfc_int_active &nfc_disable_active
						&nfc_clk_default>;
		pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;
		clocks = <&clock_gcc clk_bb_clk2_pin>;
		clock-names = "ref_clk";
	};
};

&sdhc_1 {
	/* device core power supply */
	vdd-supply = <&pm8953_l8>;