Merge "clk: msm: Add support to configure calibration L value" (7dec14e8) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/clk/msm/clock-alpha-pll.c

+8 −1

Original line number	Diff line number	Diff line
		/*
		* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
		* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -774,6 +774,13 @@ void __init_alpha_pll(struct clk *c)
		writel_relaxed(regval, USER_CTL_HI_REG(pll));
		}

		if (masks->cal_l_val_mask && pll->cal_l_val) {
		regval = readl_relaxed(USER_CTL_HI_REG(pll));
		regval &= ~masks->cal_l_val_mask;
		regval \|= pll->cal_l_val;
		writel_relaxed(regval, USER_CTL_HI_REG(pll));
		}

		if (masks->test_ctl_lo_mask) {
		regval = readl_relaxed(TEST_CTL_LO_REG(pll));
		regval &= ~masks->test_ctl_lo_mask;

+3 −1

Original line number	Diff line number	Diff line
		/*
		* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
		* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -27,6 +27,7 @@ struct alpha_pll_masks {
		u32 alpha_en_mask; /* alpha_en bit */
		u32 output_mask; /* pllout_* bits */
		u32 post_div_mask;
		u32 cal_l_val_mask;

		u32 test_ctl_lo_mask;
		u32 test_ctl_hi_mask;
		@@ -61,6 +62,7 @@ struct alpha_pll_clk {
		u32 config_ctl_val; /* config register init value */
		u32 test_ctl_lo_val; /* test control settings */
		u32 test_ctl_hi_val;
		u32 cal_l_val; /* Calibration L value */

		struct alpha_pll_vco_tbl *vco_tbl;
		u32 num_vco;