Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7d915a38 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

[AGP] Fix intel 965 AGP memory mapping function 



This introduces a i965-specific "mask_memory()" function that knows
about the extended physical addresses that the i965 supports.  This
allows us to correctly map in physical memory in the >4GB range into the
GTT.

Also simplify/clean-up the i965 case for the aperture sizing by just
returning the fixed 512kB size from "fetch_size()".  We don't really
care that not all of the aperture may be visible - the only thing that
cares about the aperture size is the Intel "stolen memory" calculation,
which depends on the fixed size.

Cc: Keith Packard <keithp@keithp.com>
Cc: Eric Anholt <eric@anholt.net>
Cc: Dave Jones <davej@redhat.com>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent b42172fc

drivers/char/agp/intel-agp.c

+24 −7
Original line number Diff line number Diff line
@@ -387,10 +387,6 @@ static void intel_i830_init_gtt_entries(void) 
	/* We obtain the size of the GTT, which is also stored (for some

	 * reason) at the top of stolen memory. Then we add 4KB to that

	 * for the video BIOS popup, which is also stored in there. */



	if (IS_I965)

		size = 512 + 4;

	else

	size = agp_bridge->driver->fetch_size() + 4;



	if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82830_HB ||
@@ -805,6 +801,26 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge) 


	return 0;

}



/*

 * The i965 supports 36-bit physical addresses, but to keep

 * the format of the GTT the same, the bits that don't fit

 * in a 32-bit word are shifted down to bits 4..7.

 *

 * Gcc is smart enough to notice that "(addr >> 28) & 0xf0"

 * is always zero on 32-bit architectures, so no need to make

 * this conditional.

 */

static unsigned long intel_i965_mask_memory(struct agp_bridge_data *bridge,

	unsigned long addr, int type)

{

	/* Shift high bits down */

	addr |= (addr >> 28) & 0xf0;



	/* Type checking must be done elsewhere */

	return addr | bridge->driver->masks[type].mask;

}



static int intel_i965_fetch_size(void)

{

       struct aper_size_info_fixed *values;
@@ -832,7 +848,8 @@ static int intel_i965_fetch_size(void) 


       agp_bridge->previous_size = agp_bridge->current_size = (void *)(values + offset);



       return values[offset].size;

	/* The i965 GTT is always sized as if it had a 512kB aperture size */

	return 512;

}



/* The intel i965 automatically initializes the agp aperture during POST.
@@ -1584,7 +1601,7 @@ static struct agp_bridge_driver intel_i965_driver = { 
       .fetch_size             = intel_i965_fetch_size,

       .cleanup                = intel_i915_cleanup,

       .tlb_flush              = intel_i810_tlbflush,

       .mask_memory            = intel_i810_mask_memory,

       .mask_memory            = intel_i965_mask_memory,

       .masks                  = intel_i810_masks,

       .agp_enable             = intel_i810_agp_enable,

       .cache_flush            = global_cache_flush,