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Commit 7d79a329 authored by Marc Zyngier's avatar Marc Zyngier Committed by Greg Kroah-Hartman
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BACKPORT: arm64: Add CNTVCT_EL0 trap handler 



Since people seem to make a point in breaking the userspace visible
counter, we have no choice but to trap the access. Add the required
handler.

Acked-by: default avatarThomas Gleixner <tglx@linutronix.de>
Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
(cherry picked from commit 6126ce0588eb5a0752d5c8b5796a7fca324fd887)

Change-Id: I05700a533ea59e864e7a072605e3000e29526db3
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
parent 665ae282

arch/arm64/include/asm/esr.h

+2 −0
Original line number Diff line number Diff line
@@ -175,6 +175,8 @@ 
#define ESR_ELx_SYS64_ISS_SYS_CTR_READ	(ESR_ELx_SYS64_ISS_SYS_CTR | \

					 ESR_ELx_SYS64_ISS_DIR_READ)



#define ESR_ELx_SYS64_ISS_SYS_CNTVCT	(ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 2, 14, 0) | \

					 ESR_ELx_SYS64_ISS_DIR_READ)

#ifndef __ASSEMBLY__

#include <asm/types.h>

arch/arm64/kernel/traps.c

+15 −0
Original line number Diff line number Diff line
@@ -495,6 +495,15 @@ static void ctr_read_handler(unsigned int esr, struct pt_regs *regs) 
	regs->pc += 4;

}



static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs)

{

	int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;



	if (rt != 31)

		regs->regs[rt] = arch_counter_get_cntvct();

	regs->pc += 4;

}



struct sys64_hook {

	unsigned int esr_mask;

	unsigned int esr_val;
@@ -513,6 +522,12 @@ static struct sys64_hook sys64_hooks[] = { 
		.esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ,

		.handler = ctr_read_handler,

	},

	{

		/* Trap read access to CNTVCT_EL0 */

		.esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,

		.esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCT,

		.handler = cntvct_read_handler,

	},

	{},

};