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Commit 7cbfd065 authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter
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drm/i915: don't call ironlake_enable_pch_pll on lpt_pch_enable 



This is just wrong. The lpt_program_iclkip should disable the PCH
pixel clocks (and yes, we plan to rename it later).

Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent b6b4e185

drivers/gpu/drm/i915/intel_display.c

+0 −9
Original line number Diff line number Diff line
@@ -3181,15 +3181,6 @@ static void lpt_pch_enable(struct drm_crtc *crtc) 
	/* For PCH output, training FDI link */

	dev_priv->display.fdi_link_train(crtc);



	/* XXX: pch pll's can be enabled any time before we enable the PCH

	 * transcoder, and we actually should do this to not upset any PCH

	 * transcoder that already use the clock when we share it.

	 *

	 * Note that enable_pch_pll tries to do the right thing, but get_pch_pll

	 * unconditionally resets the pll - we need that to have the right LVDS

	 * enable sequence. */

	ironlake_enable_pch_pll(intel_crtc);



	lpt_program_iclkip(crtc);



	/* set transcoder timing, panel must allow it */