Loading arch/arm64/boot/dts/qcom/sdm845-qupv3.dtsi +48 −0 Original line number Diff line number Diff line Loading @@ -221,6 +221,9 @@ interrupts = <GIC_SPI 601 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 0 1 64 0>, <&gpi_dma0 1 0 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -240,6 +243,9 @@ interrupts = <GIC_SPI 602 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 1 1 64 0>, <&gpi_dma0 1 1 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -259,6 +265,9 @@ interrupts = <GIC_SPI 603 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 2 1 64 0>, <&gpi_dma0 1 2 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -278,6 +287,9 @@ interrupts = <GIC_SPI 604 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 3 1 64 0>, <&gpi_dma0 1 3 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -297,6 +309,9 @@ interrupts = <GIC_SPI 605 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 4 1 64 0>, <&gpi_dma0 1 4 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -316,6 +331,9 @@ interrupts = <GIC_SPI 606 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 5 1 64 0>, <&gpi_dma0 1 5 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -335,6 +353,9 @@ interrupts = <GIC_SPI 607 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 6 1 64 0>, <&gpi_dma0 1 6 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -354,6 +375,9 @@ interrupts = <GIC_SPI 608 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 7 1 64 0>, <&gpi_dma0 1 7 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading Loading @@ -561,6 +585,9 @@ interrupts = <GIC_SPI 353 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 0 1 64 0>, <&gpi_dma1 1 0 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -580,6 +607,9 @@ interrupts = <GIC_SPI 354 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 1 1 64 0>, <&gpi_dma1 1 1 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -599,6 +629,9 @@ interrupts = <GIC_SPI 355 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 2 1 64 0>, <&gpi_dma1 1 2 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -618,6 +651,9 @@ interrupts = <GIC_SPI 356 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 3 1 64 0>, <&gpi_dma1 1 3 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -637,6 +673,9 @@ interrupts = <GIC_SPI 357 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 4 1 64 0>, <&gpi_dma1 1 4 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -656,6 +695,9 @@ interrupts = <GIC_SPI 358 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 5 1 64 0>, <&gpi_dma1 1 5 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -675,6 +717,9 @@ interrupts = <GIC_SPI 359 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 6 1 64 0>, <&gpi_dma1 1 6 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -694,6 +739,9 @@ interrupts = <GIC_SPI 360 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 7 1 64 0>, <&gpi_dma1 1 7 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; }; Loading
arch/arm64/boot/dts/qcom/sdm845-qupv3.dtsi +48 −0 Original line number Diff line number Diff line Loading @@ -221,6 +221,9 @@ interrupts = <GIC_SPI 601 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 0 1 64 0>, <&gpi_dma0 1 0 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -240,6 +243,9 @@ interrupts = <GIC_SPI 602 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 1 1 64 0>, <&gpi_dma0 1 1 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -259,6 +265,9 @@ interrupts = <GIC_SPI 603 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 2 1 64 0>, <&gpi_dma0 1 2 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -278,6 +287,9 @@ interrupts = <GIC_SPI 604 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 3 1 64 0>, <&gpi_dma0 1 3 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -297,6 +309,9 @@ interrupts = <GIC_SPI 605 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 4 1 64 0>, <&gpi_dma0 1 4 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -316,6 +331,9 @@ interrupts = <GIC_SPI 606 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 5 1 64 0>, <&gpi_dma0 1 5 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -335,6 +353,9 @@ interrupts = <GIC_SPI 607 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 6 1 64 0>, <&gpi_dma0 1 6 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -354,6 +375,9 @@ interrupts = <GIC_SPI 608 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_0>; dmas = <&gpi_dma0 0 7 1 64 0>, <&gpi_dma0 1 7 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading Loading @@ -561,6 +585,9 @@ interrupts = <GIC_SPI 353 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 0 1 64 0>, <&gpi_dma1 1 0 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -580,6 +607,9 @@ interrupts = <GIC_SPI 354 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 1 1 64 0>, <&gpi_dma1 1 1 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -599,6 +629,9 @@ interrupts = <GIC_SPI 355 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 2 1 64 0>, <&gpi_dma1 1 2 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -618,6 +651,9 @@ interrupts = <GIC_SPI 356 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 3 1 64 0>, <&gpi_dma1 1 3 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -637,6 +673,9 @@ interrupts = <GIC_SPI 357 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 4 1 64 0>, <&gpi_dma1 1 4 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -656,6 +695,9 @@ interrupts = <GIC_SPI 358 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 5 1 64 0>, <&gpi_dma1 1 5 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -675,6 +717,9 @@ interrupts = <GIC_SPI 359 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 6 1 64 0>, <&gpi_dma1 1 6 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; Loading @@ -694,6 +739,9 @@ interrupts = <GIC_SPI 360 0>; spi-max-frequency = <50000000>; qcom,wrapper-core = <&qupv3_1>; dmas = <&gpi_dma1 0 7 1 64 0>, <&gpi_dma1 1 7 1 64 0>; dma-names = "tx", "rx"; status = "disabled"; }; };