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Commit 7c494ad0 authored by Heiko Stuebner's avatar Heiko Stuebner Committed by Stephen Boyd
Browse files

clk: rockchip: fix issues in the mmc-phase clock 



The review for the new inverter clock type uncovered some issues (missing
headers and name handling) that are also present in the mmc-phase clock
type, I got (to much) inspiration from. Fix these there too.

Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 8a76f443

drivers/clk/rockchip/clk-mmc-phase.c

+3 −3
Original line number Diff line number Diff line
@@ -15,6 +15,8 @@ 


#include <linux/slab.h>

#include <linux/clk-provider.h>

#include <linux/io.h>

#include <linux/kernel.h>

#include "clk.h"



struct rockchip_mmc_clock {
@@ -131,6 +133,7 @@ struct clk *rockchip_clk_register_mmc(const char *name, 
	if (!mmc_clock)

		return NULL;



	init.name = name;

	init.num_parents = num_parents;

	init.parent_names = parent_names;

	init.ops = &rockchip_mmc_clk_ops;
@@ -139,9 +142,6 @@ struct clk *rockchip_clk_register_mmc(const char *name, 
	mmc_clock->reg = reg;

	mmc_clock->shift = shift;



	if (name)

		init.name = name;



	clk = clk_register(NULL, &mmc_clock->hw);

	if (IS_ERR(clk))

		goto err_free;