Merge "clk: qcom: gcc-sdm845: Add additional frequencies for the SDCC clocks" into msm-4.9 (7c318d5b) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/clk/qcom/gcc-sdm845.c

+5 −1

Original line number	Original line	Diff line number	Diff line
	@@ -796,7 +796,10 @@ static struct clk_rcg2 gcc_qupv3_wrap1_s7_clk_src = {
	};		};

	static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = {		static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = {
			F(400000, P_BI_TCXO, 12, 1, 4),
	F(19200000, P_BI_TCXO, 1, 0, 0),		F(19200000, P_BI_TCXO, 1, 0, 0),
			F(25000000, P_GPLL0_OUT_MAIN, 12, 1, 2),
			F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0),
	F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0),		F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0),
	F(200000000, P_GPLL0_OUT_MAIN, 3, 0, 0),		F(200000000, P_GPLL0_OUT_MAIN, 3, 0, 0),
	{ }		{ }
	@@ -824,8 +827,9 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = {
	};		};

	static const struct freq_tbl ftbl_gcc_sdcc4_apps_clk_src[] = {		static const struct freq_tbl ftbl_gcc_sdcc4_apps_clk_src[] = {
	F(9600000, P_BI_TCXO, 2, 0, 0),		F(400000, P_BI_TCXO, 12, 1, 4),
	F(19200000, P_BI_TCXO, 1, 0, 0),		F(19200000, P_BI_TCXO, 1, 0, 0),
			F(25000000, P_GPLL0_OUT_MAIN, 12, 1, 2),
	F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0),		F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0),
	F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0),		F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0),
	{ }		{ }