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Commit 7b8467e8 authored by Venkat Chinta's avatar Venkat Chinta Committed by Gerrit - the friendly Code Review server
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msm: camera: isp: Adds register dump to camif irq bottom half 



Dump registers in camif irq bottom half in case of ISP hardware error.

Change-Id: I9fa465969e7d839cbdaa43c0e365c41478faeb78
Signed-off-by: default avatarVenkat Chinta <vchinta@codeaurora.org>
parent 8ebe79c0

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/include/cam_isp_hw.h

+1 −0
Original line number Diff line number Diff line
@@ -94,6 +94,7 @@ enum cam_isp_hw_cmd_type { 
	CAM_ISP_HW_CMD_BW_UPDATE,

	CAM_ISP_HW_CMD_BW_CONTROL,

	CAM_ISP_HW_CMD_STOP_BUS_ERR_IRQ,

	CAM_ISP_HW_CMD_GET_REG_DUMP,

	CAM_ISP_HW_CMD_MAX,

};

drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_camif_ver2.c

+59 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
#include "cam_vfe_camif_ver2.h"

#include "cam_debug_util.h"

#include "cam_cdm_util.h"

#include "cam_cpas_api.h"



struct cam_vfe_mux_camif_data {

	void __iomem                                *mem_base;
@@ -253,6 +254,60 @@ static int cam_vfe_camif_resource_start( 
	return 0;

}



static int cam_vfe_camif_reg_dump(

	struct cam_isp_resource_node *camif_res)

{

	struct cam_vfe_mux_camif_data *camif_priv;

	struct cam_vfe_soc_private *soc_private;

	int rc = 0, i;

	uint32_t val = 0;



	if (!camif_res) {

		CAM_ERR(CAM_ISP, "Error! Invalid input arguments");

		return -EINVAL;

	}



	if ((camif_res->res_state == CAM_ISP_RESOURCE_STATE_RESERVED) ||

		(camif_res->res_state == CAM_ISP_RESOURCE_STATE_AVAILABLE))

		return 0;



	camif_priv = (struct cam_vfe_mux_camif_data *)camif_res->res_priv;

	soc_private = camif_priv->soc_info->soc_private;

	for (i = 0xA3C; i <= 0xA90; i += 4) {

		val = cam_io_r_mb(camif_priv->mem_base + i);

		CAM_INFO(CAM_ISP, "offset 0x%x val 0x%x", i, val);

	}



	for (i = 0xE0C; i <= 0xE3C; i += 4) {

		val = cam_io_r_mb(camif_priv->mem_base + i);

		CAM_INFO(CAM_ISP, "offset 0x%x val 0x%x", i, val);

	}



	for (i = 0x2000; i <= 0x20B8; i += 4) {

		val = cam_io_r_mb(camif_priv->mem_base + i);

		CAM_INFO(CAM_ISP, "offset 0x%x val 0x%x", i, val);

	}



	for (i = 0x2500; i <= 0x255C; i += 4) {

		val = cam_io_r_mb(camif_priv->mem_base + i);

		CAM_INFO(CAM_ISP, "offset 0x%x val 0x%x", i, val);

	}



	for (i = 0x2600; i <= 0x265C; i += 4) {

		val = cam_io_r_mb(camif_priv->mem_base + i);

		CAM_INFO(CAM_ISP, "offset 0x%x val 0x%x", i, val);

	}



	cam_cpas_reg_read(soc_private->cpas_handle,

		CAM_CPAS_REG_CAMNOC, 0x420, true, &val);

	CAM_INFO(CAM_ISP, "IFE02_MAXWR_LOW offset 0x420 val 0x%x", val);



	cam_cpas_reg_read(soc_private->cpas_handle,

		CAM_CPAS_REG_CAMNOC, 0x820, true, &val);

	CAM_INFO(CAM_ISP, "IFE13_MAXWR_LOW offset 0x820 val 0x%x", val);



	return rc;

}



static int cam_vfe_camif_resource_stop(

	struct cam_isp_resource_node        *camif_res)
@@ -304,6 +359,9 @@ static int cam_vfe_camif_process_cmd(struct cam_isp_resource_node *rsrc_node, 
		rc = cam_vfe_camif_get_reg_update(rsrc_node, cmd_args,

			arg_size);

		break;

	case CAM_ISP_HW_CMD_GET_REG_DUMP:

		rc = cam_vfe_camif_reg_dump(rsrc_node);

		break;

	default:

		CAM_ERR(CAM_ISP,

			"unsupported process command:%d", cmd_type);
@@ -372,6 +430,7 @@ static int cam_vfe_camif_handle_irq_bottom_half(void *handler_priv, 
		if (irq_status1 & camif_priv->reg_data->error_irq_mask1) {

			CAM_DBG(CAM_ISP, "Received ERROR\n");

			ret = CAM_ISP_HW_ERROR_OVERFLOW;

			cam_vfe_camif_reg_dump(camif_node);

		} else {

			ret = CAM_ISP_HW_ERROR_NONE;

		}