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Commit 7b255436 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Bartlomiej Zolnierkiewicz
Browse files

siimage: coding style cleanup (take 2) 



Fix 18 errors and several warnings given by checkpatch.pl:

- use of C99 // comments;

- trailing whitespace;

- 'switch' and 'case' not at the same indentation level;

- no space before the open parenthesis of the 'if' and 'switch' statements;

- space between function name and open parenthesis (though I have introduced
  such warnins in some places since the code looks prettier with the spaces);

- including <asm/io.h> instead of <linux/io.h>;

- line over 80 characters.

In addition to these changes, also do the following:

- make the arrays in sil_set_pio_mode() 'static', and make the arrays in
  sil_set_dma_mode() 'static const';

- change the string of the 'if' statements into the 'switch' statement in
  sil_pata_udma_filter();

- drop the needless '==' operators from the 'if' statements where a condition
  is a mere bit test;

- remove needless initializer for the 'tmp' variable in init_chipset_siimage();

- beautify groups of the variable initializers and assignment operators;

- add new line after variable definitions;

- remove new line between the comment and the statements it refers to;

- remove needless curly braces and parentheses;

- fix typos, capitalize acronyms, etc. in the comments...

Signed-off-by: default avatarSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
parent eee49298

drivers/ide/pci/siimage.c

+113 −119
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2001-2002	Andre Hedrick <andre@linux-ide.org>

 * Copyright (C) 2003		Red Hat <alan@redhat.com>

 * Copyright (C) 2007		MontaVista Software, Inc.

 * Copyright (C) 2007-2008	MontaVista Software, Inc.

 * Copyright (C) 2007-2008	Bartlomiej Zolnierkiewicz

 *

 *  May be copied or modified under the terms of the GNU General Public License
@@ -17,10 +17,10 @@ 
 *

 *  FAQ Items:

 *	If you are using Marvell SATA-IDE adapters with Maxtor drives

 *	ensure the system is set up for ATA100/UDMA5 not UDMA6.

 *	ensure the system is set up for ATA100/UDMA5, not UDMA6.

 *

 *	If you are using WD drives with SATA bridges you must set the

 *	drive to "Single". "Master" will hang

 *	drive to "Single". "Master" will hang.

 *

 *	If you have strange problems with nVidia chipset systems please

 *	see the SI support documentation and update your system BIOS
@@ -42,8 +42,7 @@ 
#include <linux/hdreg.h>

#include <linux/ide.h>

#include <linux/init.h>



#include <asm/io.h>

#include <linux/io.h>



/**

 *	pdev_is_sata		-	check if device is SATA
@@ -86,18 +85,19 @@ static inline int is_sata(ide_hwif_t *hwif) 
 *

 *	Turn a config register offset into the right address in either

 *	PCI space or MMIO space to access the control register in question

 *	Thankfully this is a configuration operation so isnt performance

 *	criticial. 

 *	Thankfully this is a configuration operation, so isn't performance

 *	critical.

 */



static unsigned long siimage_selreg(ide_hwif_t *hwif, int r)

{

	unsigned long base = (unsigned long)hwif->hwif_data;



	base += 0xA0 + r;

	if (hwif->mmio)

		base += (hwif->channel << 6);

		base += hwif->channel << 6;

	else

		base += (hwif->channel << 4);

		base += hwif->channel << 4;

	return base;

}
@@ -115,11 +115,12 @@ static inline unsigned long siimage_seldev(ide_drive_t *drive, int r) 
{

	ide_hwif_t *hwif	= HWIF(drive);

	unsigned long base	= (unsigned long)hwif->hwif_data;



	base += 0xA0 + r;

	if (hwif->mmio)

		base += (hwif->channel << 6);

		base += hwif->channel << 6;

	else

		base += (hwif->channel << 4);

		base += hwif->channel << 4;

	base |= drive->select.b.unit << drive->select.b.unit;

	return base;

}
@@ -187,18 +188,23 @@ static u8 sil_pata_udma_filter(ide_drive_t *drive) 
	ide_hwif_t *hwif	= drive->hwif;

	struct pci_dev *dev	= to_pci_dev(hwif->dev);

	unsigned long base	= (unsigned long)hwif->hwif_data;

	u8 mask = 0, scsc;

	u8 scsc, mask		= 0;



	scsc = sil_ioread8(dev, base + (hwif->mmio ? 0x4A : 0x8A));



	if ((scsc & 0x30) == 0x10)	/* 133 */

	switch (scsc & 0x30) {

	case 0x10:	/* 133 */

		mask = ATA_UDMA6;

	else if ((scsc & 0x30) == 0x20)	/* 2xPCI */

		break;

	case 0x20:	/* 2xPCI */

		mask = ATA_UDMA6;

	else if ((scsc & 0x30) == 0x00)	/* 100 */

		break;

	case 0x00:	/* 100 */

		mask = ATA_UDMA5;

	else 	/* Disabled ? */

		break;

	default: 	/* Disabled ? */

		BUG();

	}



	return mask;

}
@@ -220,8 +226,8 @@ static u8 sil_sata_udma_filter(ide_drive_t *drive) 


static void sil_set_pio_mode(ide_drive_t *drive, u8 pio)

{

	const u16 tf_speed[]	= { 0x328a, 0x2283, 0x1281, 0x10c3, 0x10c1 };

	const u16 data_speed[]	= { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 };

	static const u16 tf_speed[]   = { 0x328a, 0x2283, 0x1281, 0x10c3, 0x10c1 };

	static const u16 data_speed[] = { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 };



	ide_hwif_t *hwif	= HWIF(drive);

	struct pci_dev *dev	= to_pci_dev(hwif->dev);
@@ -261,7 +267,7 @@ static void sil_set_pio_mode(ide_drive_t *drive, u8 pio) 


	mode = sil_ioread8(dev, base + addr_mask);

	mode &= ~(unit ? 0x30 : 0x03);

	mode |= (unit ? 0x10 : 0x01);

	mode |= unit ? 0x10 : 0x01;

	sil_iowrite8(dev, mode, base + addr_mask);

}
@@ -275,19 +281,18 @@ static void sil_set_pio_mode(ide_drive_t *drive, u8 pio) 


static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed)

{

	u8 ultra6[]		= { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 };

	u8 ultra5[]		= { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 };

	u16 dma[]		= { 0x2208, 0x10C2, 0x10C1 };

	static const u8 ultra6[] = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 };

	static const u8 ultra5[] = { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 };

	static const u16 dma[]	 = { 0x2208, 0x10C2, 0x10C1 };



	ide_hwif_t *hwif	= HWIF(drive);

	struct pci_dev *dev	= to_pci_dev(hwif->dev);

	u16 ultra = 0, multi	= 0;

	u8 mode = 0, unit	= drive->select.b.unit;

	unsigned long base	= (unsigned long)hwif->hwif_data;

	u8 scsc = 0, addr_mask	= ((hwif->channel) ?

				    ((hwif->mmio) ? 0xF4 : 0x84) :

				    ((hwif->mmio) ? 0xB4 : 0x80));

				    

	u8 scsc = 0, addr_mask	= hwif->channel ?

					(hwif->mmio ? 0xF4 : 0x84) :

					(hwif->mmio ? 0xB4 : 0x80);

	unsigned long ma	= siimage_seldev(drive, 0x08);

	unsigned long ua	= siimage_seldev(drive, 0x0C);
@@ -296,7 +301,7 @@ static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed) 
	multi = sil_ioread16(dev, ma);

	ultra = sil_ioread16(dev, ua);



	mode &= ~((unit) ? 0x30 : 0x03);

	mode  &= ~(unit ? 0x30 : 0x03);

	ultra &= ~0x3F;

	scsc = ((scsc & 0x30) == 0x00) ? 0 : 1;
@@ -304,12 +309,12 @@ static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed) 


	if (speed >= XFER_UDMA_0) {

		multi  = dma[2];

		ultra |= (scsc ? ultra6[speed - XFER_UDMA_0] :

				 ultra5[speed - XFER_UDMA_0]);

		mode |= (unit ? 0x30 : 0x03);

		ultra |= scsc ? ultra6[speed - XFER_UDMA_0] :

				ultra5[speed - XFER_UDMA_0];

		mode  |= unit ? 0x30 : 0x03;

	} else {

		multi = dma[speed - XFER_MW_DMA_0];

		mode |= (unit ? 0x20 : 0x02);

		mode |= unit ? 0x20 : 0x02;

	}



	sil_iowrite8 (dev, mode, base + addr_mask);
@@ -326,13 +331,14 @@ static int siimage_io_dma_test_irq(ide_drive_t *drive) 
	unsigned long addr	= siimage_selreg(hwif, 1);



	/* return 1 if INTR asserted */

	if ((hwif->INB(hwif->dma_status) & 4) == 4)

	if (hwif->INB(hwif->dma_status) & 4)

		return 1;



	/* return 1 if Device INTR asserted */

	pci_read_config_byte(dev, addr, &dma_altstat);

	if (dma_altstat & 8)

		return 0;	//return 1;

		return 0;	/* return 1; */



	return 0;

}
@@ -363,25 +369,22 @@ static int siimage_mmio_dma_test_irq(ide_drive_t *drive) 
			watchdog = (sata_error & 0x00680000) ? 1 : 0;

			printk(KERN_WARNING "%s: sata_error = 0x%08x, "

				"watchdog = %d, %s\n",

				drive->name, sata_error, watchdog,

				__func__);



		} else {

				drive->name, sata_error, watchdog, __func__);

		} else

			watchdog = (ext_stat & 0x8000) ? 1 : 0;

		}

		ext_stat >>= 16;



		ext_stat >>= 16;

		if (!(ext_stat & 0x0404) && !watchdog)

			return 0;

	}



	/* return 1 if INTR asserted */

	if ((readb((void __iomem *)hwif->dma_status) & 0x04) == 0x04)

	if (readb((void __iomem *)hwif->dma_status) & 0x04)

		return 1;



	/* return 1 if Device INTR asserted */

	if ((readb((void __iomem *)addr) & 8) == 8)

		return 0;	//return 1;

	if (readb((void __iomem *)addr) & 8)

		return 0;	/* return 1; */



	return 0;

}
@@ -440,13 +443,13 @@ static void sil_sata_pre_reset(ide_drive_t *drive) 
}



/**

 *	setup_mmio_siimage	-	switch an SI controller into MMIO

 *	setup_mmio_siimage	-	switch controller into MMIO mode

 *	@dev: PCI device we are configuring

 *	@name: device name

 *

 *	Attempt to put the device into mmio mode. There are some slight

 *	complications here with certain systems where the mmio bar isnt

 *	mapped so we have to be sure we can fall back to I/O.

 *	Attempt to put the device into MMIO mode. There are some slight

 *	complications here with certain systems where the MMIO BAR isn't

 *	mapped, so we have to be sure that we can fall back to I/O.

 */



static unsigned int setup_mmio_siimage(struct pci_dev *dev, const char *name)
@@ -456,17 +459,16 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name) 
	void __iomem *ioaddr;



	/*

	 *	Drop back to PIO if we can't map the mmio. Some

	 *	systems seem to get terminally confused in the PCI

	 *	spaces.

	 *	Drop back to PIO if we can't map the MMIO. Some	systems

	 *	seem to get terminally confused in the PCI spaces.

	 */

	if (!request_mem_region(bar5, barsize, name)) {

		printk(KERN_WARNING "siimage: IDE controller MMIO ports not available.\n");

		printk(KERN_WARNING "siimage: IDE controller MMIO ports not "

				    "available.\n");

		return 0;

	}



	ioaddr = ioremap(bar5, barsize);



	if (ioaddr == NULL) {

		release_mem_region(bar5, barsize);

		return 0;
@@ -487,20 +489,20 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name) 
 *	to 133 MHz clocking if the system isn't already set up to do it.

 */



static unsigned int __devinit init_chipset_siimage(struct pci_dev *dev, const char *name)

static unsigned int __devinit init_chipset_siimage(struct pci_dev *dev,

						   const char *name)

{

	unsigned long base, scsc_addr;

	void __iomem *ioaddr = NULL;

	u8 rev = dev->revision, tmp = 0, BA5_EN = 0;

	u8 rev = dev->revision, tmp, BA5_EN;



	pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, rev ? 1 : 255);



	pci_read_config_byte(dev, 0x8A, &BA5_EN);



	if ((BA5_EN & 0x01) || pci_resource_start(dev, 5)) {

	if ((BA5_EN & 0x01) || pci_resource_start(dev, 5))

		if (setup_mmio_siimage(dev, name))

			ioaddr = pci_get_drvdata(dev);

	}



	base = (unsigned long)ioaddr;
@@ -579,8 +581,7 @@ static unsigned int __devinit init_chipset_siimage(struct pci_dev *dev, const ch 
 *

 *	The basic setup here is fairly simple, we can use standard MMIO

 *	operations. However we do have to set the taskfile register offsets

 *	by hand as there isnt a standard defined layout for them this

 *	time.

 *	by hand as there isn't a standard defined layout for them this time.

 *

 *	The hardware supports buffered taskfiles and also some rather nice

 *	extended PRD tables. For better SI3112 support use the libata driver
@@ -591,24 +592,20 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif) 
	struct pci_dev *dev	= to_pci_dev(hwif->dev);

	void *addr		= pci_get_drvdata(dev);

	u8 ch			= hwif->channel;

	unsigned long		base;



	struct ide_io_ports *io_ports = &hwif->io_ports;

	unsigned long base;



	/*

	 *	Fill in the basic HWIF bits

	 *	Fill in the basic hwif bits

	 */



	hwif->host_flags |= IDE_HFLAG_MMIO;

	default_hwif_mmiops(hwif);

	hwif->hwif_data	= addr;



	/*

	 *	Now set up the hw. We have to do this ourselves as

	 *	the MMIO layout isnt the same as the standard port

	 *	based I/O

	 *	Now set up the hw. We have to do this ourselves as the

	 *	MMIO layout isn't the same as the standard port based I/O.

	 */



	memset(io_ports, 0, sizeof(*io_ports));



	base = (unsigned long)addr;
@@ -618,9 +615,8 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif) 
		base += 0x80;



	/*

	 *	The buffered task file doesn't have status/control

	 *	so we can't currently use it sanely since we want to

	 *	use LBA48 mode.

	 *	The buffered task file doesn't have status/control, so we

	 *	can't currently use it sanely since we want to use LBA48 mode.

	 */

	io_ports->data_addr	= base;

	io_ports->error_addr	= base + 1;
@@ -651,18 +647,16 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif) 
static int is_dev_seagate_sata(ide_drive_t *drive)

{

	const char *s	= &drive->id->model[0];

	unsigned len;

	unsigned len	= strnlen(s, sizeof(drive->id->model));



	len = strnlen(s, sizeof(drive->id->model));



	if ((len > 4) && (!memcmp(s, "ST", 2))) {

	if ((len > 4) && (!memcmp(s, "ST", 2)))

		if ((!memcmp(s + len - 2, "AS", 2)) ||

		    (!memcmp(s + len - 3, "ASL", 3))) {

			printk(KERN_INFO "%s: applying pessimistic Seagate "

					 "errata fix\n", drive->name);

			return 1;

		}

	}



	return 0;

}
@@ -679,7 +673,7 @@ static void __devinit sil_quirkproc(ide_drive_t *drive) 
{

	ide_hwif_t *hwif = drive->hwif;



	/* Try and raise the rqsize */

	/* Try and rise the rqsize */

	if (!is_sata(hwif) || !is_dev_seagate_sata(drive))

		hwif->rqsize = 128;

}
@@ -713,8 +707,7 @@ static void __devinit init_iops_siimage(ide_hwif_t *hwif) 
 *	sil_cable_detect	-	cable detection

 *	@hwif: interface to check

 *

 *	Check for the presence of an ATA66 capable cable on the

 *	interface.

 *	Check for the presence of an ATA66 capable cable on the interface.

 */



static u8 __devinit sil_cable_detect(ide_hwif_t *hwif)
@@ -767,15 +760,16 @@ static const struct ide_port_info siimage_chipsets[] __devinitdata = { 
};



/**

 *	siimage_init_one	-	pci layer discovery entry

 *	siimage_init_one	-	PCI layer discovery entry

 *	@dev: PCI device

 *	@id: ident table entry

 *

 *	Called by the PCI code when it finds an SI680 or SI3112 controller.

 *	Called by the PCI code when it finds an SiI680 or SiI3112 controller.

 *	We then use the IDE PCI generic helper to do most of the work.

 */



static int __devinit siimage_init_one(struct pci_dev *dev, const struct pci_device_id *id)

static int __devinit siimage_init_one(struct pci_dev *dev,

				      const struct pci_device_id *id)

{

	struct ide_port_info d;

	u8 idx = id->driver_data;